Safety monitor for incorrect kernel computation

Patent metadata

Field	Value
Publication number	US-2020409773-A1
Application number	US-201916457237-A
Country	US
Kind code	A1
Filing date	Jun 28, 2019
Priority date	Jun 28, 2019
Publication date	Dec 31, 2020
Grant date	—

Abstract

Systems, apparatuses, and methods for implementing a safety monitor framework for a safety-critical graphics processing unit (GPU) compute application are disclosed. A system includes a safety-critical GPU compute application, a safety monitor, and a GPU. The safety monitor receives a compute grid, test vectors, and a compute kernel from the safety-critical GPU compute application. The safety monitor generates a modified compute grid by adding extra tiles to the original compute grid, with the extra tiles generated based on the test vectors. The safety monitor provides the modified compute grid and compute kernel to the GPU for processing. The safety monitor determines the likelihood of erroneous processing of the original compute grid by comparing the actual results for the extra tiles with known good results. The safety monitor complements the overall fault coverage of the GPU hardware and covers faults only observable at the application programming interface (API) level.

First claim

What is claimed is:

1 . A system comprising:
a first processing unit; and a second processing unit configured to:
receive a compute grid and a kernel for execution on the first processing unit;
extend the compute grid by one or more extra grid tiles;
extend kernel computation to cover the one or more extra grid tiles;
after kernel computation has completed, compare an actual result from the extra one or more grids with an expected result; and
perform one or more corrective actions responsive to determining that the actual result from the first processing unit processing the one or more extra grid tiles does not match the expected result.

2 . The system as recited in claim 1 , wherein the second processing unit is further configured to generate the extra one or more grid tiles based on a given test vector.

3 . The system as recited in claim 2 , wherein the expected result is a given result corresponding to the given test vector.

4 . The system as recited in claim 1 , wherein the one or more corrective actions comprise terminating a safety-critical application.

5 . The system as recited in claim 1 , wherein the second processing unit is further configured to:
convert the kernel into a kernel binary; cause the kernel binary to be executed on a given test dataset; and allow the kernel binary to be executed on an actual dataset responsive to determining that the given test dataset was processed correctly.

6 . The system as recited in claim 5 , wherein the second processing unit is further configured to:
generate a first signature of the kernel binary during a first dispatch of the kernel; store the first signature of the kernel binary; generate a second signature of the kernel binary on a second dispatch of the kernel; and allow the kernel binary to be executed on the first processing unit after the second dispatch responsive to determining that the second signature matches the first signature.

7 . The system as recited in claim 6 , wherein the second processing unit is further configured to request that the kernel be dispatched again responsive to determining that the second signature does not match the first signature.

8 . A method comprising:
receiving, by a second processing unit, a compute grid and a kernel for execution on a first processing unit; extending the compute grid by one or more extra grid tiles; extending kernel computation to cover the one or more extra grid tiles; after kernel computation has completed, comparing an actual result from the extra one or more grids with an expected result; and
performing one or more corrective actions responsive to determining that the actual result from the first processing unit processing the one or more extra grid tiles does not match the expected result.

9 . The method as recited in claim 8 , further comprising generating the extra one or more grid tiles based on a given test vector.

10 . The method as recited in claim 9 , wherein the expected result is a given result corresponding to the given test vector.

11 . The method as recited in claim 8 , wherein the one or more corrective actions comprise terminating a safety-critical application.

12 . The method as recited in claim 8 , further comprising:
converting the kernel into a kernel binary; causing the kernel binary to be executed on a given test dataset; and allowing the kernel binary to be executed on an actual dataset responsive to determining that the given test dataset was processed correctly.

13 . The method as recited in claim 12 , further comprising:
generating a first signature of the kernel binary during a first dispatch of the kernel; storing the first signature of the kernel binary; generating a second signature of the kernel binary on a second dispatch of the kernel; and allowing the kernel binary to be executed on the first processing unit after the second dispatch responsive to determining that the second signature matches the first signature.

14 . The method as recited in claim 13 , further comprising requesting that the kernel be dispatched again responsive to determining that the second signature does not match the first signature.

15 . An apparatus comprising:
a memory storing program instructions; and a processing unit coupled to the memory, wherein the program instructions are executable by the processing unit to:
receive a compute grid and a kernel for execution on a separate processing unit;
extend the compute grid by one or more extra grid tiles;
extend kernel computation to cover the one or more extra grid tiles;
after kernel computation has completed, compare an actual result from the extra one or more grids with an expected result; and
perform one or more corrective actions responsive to determining that the actual result from the separate processing unit processing the one or more extra grid tiles does not match the expected result.

16 . The apparatus as recited in claim 15 , wherein the program instructions are further executable by the processing unit to generate the extra one or more grid tiles based on a given test vector.

17 . The apparatus as recited in claim 16 , wherein the expected result is a given result corresponding to the given test vector.

18 . The apparatus as recited in claim 15 , wherein the one or more corrective actions comprise terminating a safety-critical application.

19 . The apparatus as recited in claim 15 , wherein the program instructions are further executable by the processing unit to:
convert the kernel into a kernel binary; cause the kernel binary to be executed on a given test dataset; and allow the kernel binary to be executed on an actual dataset responsive to determining that the given test dataset was processed correctly.

20 . The apparatus as recited in claim 19 , wherein the program instructions are further executable by the processing unit to:
generate a first signature of the kernel binary during a first dispatch of the kernel; store the first signature of the kernel binary; generate a second signature of the kernel binary on a second dispatch of the kernel; and allow the kernel binary to be executed on the separate processing unit after the second dispatch responsive to determining that the second signature matches the first signature.

Assignees

• Ati Technologies Ulc

Inventors

• Kwong Tung Chuen
• Ip Clarence
• Chan Benjamin Koon Pan
• Lee Kim-Koon Edward
• Manjunatha Meghana

Classifications

• G06F9/30036

  Instructions to perform operations on packed data, e.g. vector, tile or matrix operations · CPC title

• G06F11/0721

  within a central processing unit [CPU] · CPC title

• G06F11/3684

  for test design, e.g. generating new test cases · CPC title

• G06F11/0751

  Error or fault detection not based on redundancy (power supply failures G06F1/30; network fault management H04L41/06) · CPC title

• G06F11/3676 Primary

  for coverage analysis · CPC title