Power converter and method of operating the same

Patent metadata

Field	Value
Publication number	US-2020382002-A1
Application number	US-202016881785-A
Country	US
Kind code	A1
Filing date	May 22, 2020
Priority date	Jun 3, 2019
Publication date	Dec 3, 2020
Grant date	—

Abstract

In accordance with a first aspect of the present disclosure, a power converter is disclosed, comprising: an input configured to receive an input voltage; an output configured to provide an output voltage; a power switching block coupled between the input and the output; a controller configured to control the power switching block, wherein the controller is configured to open and close switches comprised in the power switching block, wherein the controller is further configured to control a resistance of the power switching block. In accordance with a second aspect of the present disclosure, a corresponding method of operating a power converter is conceived.

First claim

1 - 15 . (canceled)

16 . A power converter comprising:
an input configured to receive an input voltage; an output configured to provide an output voltage; a power switching block coupled between the input and the output; a controller configured to control the power switching block, wherein the controller is configured to open and close switches comprised in the power switching block; wherein the controller is further configured to control a resistance of the power switching block.

17 . The power converter of claim 16 , wherein the controller is configured to control said resistance by controlling an on-state resistance of the switches comprised in the power switching block.

18 . The power converter of claim 16 , wherein the controller is configured to increase the resistance if a load on the output is low and to decrease the resistance if the load on the output is high.

19 . The power converter of claim 18 , wherein the controller is configured to determine that the load on the output is low by determining that the output voltage exceeds a high threshold and to determine that the load on the output is high by determining that the output voltage falls below a low threshold.

20 . The power converter of claim 16 , wherein the controller comprises a finite state machine configured to enable or disable the power switching block in response to digital control signals.

21 . The power converter of claim 16 , wherein the controller is configured to use pulse width modulation for controlling the resistance of the power switching block.

22 . The power converter of claim 21 , wherein the controller comprises a set-reset gate configured to provide a pulse width modulation clock.

23 . The power converter of claim 16 , wherein the controller is configured to initiate an increase of the resistance if the output voltage exceeds a targeted set point after half a switching period.

24 . A near field communication device comprising the power converter of claim 16 .

25 . The near field communication device of claim 24 , wherein the power converter is configured to provide the output voltage to a secure element comprised in the near field communication device.

26 . The near field communication device of claim 24 , further comprising a front-end circuit configured to provide the input voltage.

27 . A method of operating a power converter, the power converter comprising an input, an output, a controller and a power switching block coupled between the input and the output, the method comprising:
receiving an input voltage on the input; providing an output voltage on the output; controlling, by said controller, the power switching block by opening and closing switches in the power switching block; and controlling, by said controller, a resistance of the power switching block.

28 . The method of claim 27 , wherein said resistance is controlled by controlling an on-state resistance of the switches comprised in the power switching block.

29 . The method of claim 27 , wherein the controller increases the resistance if a load on the output is low and decreases the resistance if the load on the output is high.

30 . The method of claim 29 , wherein the controller determines that the load on the output is low by determining that the output voltage exceeds a high threshold and determines that the load on the output is high by determining that the output voltage falls below a low threshold.

31 . The method of claim 27 , wherein a finite state machine comprised in the controller enables or disables the power switching block in response to digital control signals.

32 . The method of claim 27 , wherein the controller uses pulse width modulation for controlling the resistance of the power switching block.

33 . The method of claim 32 , wherein a set-reset gate comprised in the controller provides a pulse width modulation clock.

34 . The method of claim 27 , wherein the controller initiates an increase of the resistance if the output voltage exceeds a targeted set point after half a switching period.

35 . The method of claim 27 , wherein the method is implemented using a nontransitory machine-readable medium comprising executable instructions that, when executed, carry out or control the method.

Assignees

• Nxp Bv

Inventors

• Philip Melaine
• Boitard Fabien

Classifications

• H02M1/0019

  the disturbance parameters being load current fluctuations · CPC title

• H02M1/0032

  Control circuits allowing low power mode operation, e.g. in standby mode · CPC title

• H02M3/157 Primary

  with digital control · CPC title

• H02M3/04 Primary

  by static converters · CPC title

• H02M3/158

  including plural semiconductor devices as final control devices for a single load · CPC title