Bias Voltage Connections in RF Power Amplifier Packaging

Patent metadata

Field	Value
Publication number	US-2020366249-A1
Application number	US-201916414955-A
Country	US
Kind code	A1
Filing date	May 17, 2019
Priority date	May 17, 2019
Publication date	Nov 19, 2020
Grant date	—

Abstract

In integrating RF power amplifier circuits on a package, at least one bias voltage is coupled to at least one amplifier circuit on the package via two or more pins/connectors. In particular, at least one of a gate and drain bias voltage is coupled to one or more amplifier circuits via at least two pins/connectors. In some embodiments, the two or more bias voltage pins/connectors are connected together on the package, placing the pins/connectors in parallel, which reduces an inductance associated with the pins/connectors. In some embodiments, at least of the two pins/connectors connected to the same bias voltage are disposed on either side of an RF signal pin/conductor, simplifying the routing of signals on the package, affording greater flexibility of placement and routing on the package.

First claim

What is claimed is:

1 . An electronic circuit package housing one or more amplifier circuits, comprising:
a first amplifier circuit having source, gate, and drain terminals, the source terminal connected to Radio Frequency (RF) signal ground; a first RF input connector connected to the first amplifier circuit gate terminal; a first RF output connector connected to the first amplifier circuit drain terminal; a first gate bias voltage connector coupled to the gate terminal of the first amplifier circuit; a first drain bias voltage connector coupled to the drain terminal of the first amplifier circuit; and at least one of
a second gate bias voltage connector connected to the first gate bias voltage connector; and
a second drain bias voltage connector connected to the first drain bias voltage connector;

2 . The package of claim 1 wherein the parallel connections of the first and second gate bias voltage connectors or drain bias voltage connectors reduce the effective respective gate or drain bias feed inductance, relative to one respective gate or drain bias voltage connector.

3 . The package of claim 1 , wherein either one or both of
the first and second gate bias voltage connectors are disposed on opposite sides of the first RF input connector; and the first and second drain bias voltage connectors are disposed on opposite sides of the first RF output connector.

4 . The package of claim 1 , further comprising:
a second amplifier circuit having source, gate, and drain terminals, the source terminal connected to RF signal ground; a second RF input connector connected to the second amplifier circuit gate terminal; a second RF output connector connected to the second amplifier circuit drain terminal; a third gate bias voltage connector coupled to the gate terminal of the second amplifier circuit; and a third drain bias voltage connector coupled to the drain terminal of the second amplifier circuit.

5 . The package of claim 4 , further comprising at least one of
a fourth gate bias voltage connector connected to the third gate bias voltage connector; and a fourth drain bias voltage connector connected to the third drain bias voltage connector.

6 . The package of claim 4 further comprising:
a first decoupling capacitor coupled between the first gate bias voltage connector and RF signal ground; and
a second decoupling capacitor coupled between the first drain bias voltage connector and RF signal ground.

7 . The package of claim 4 wherein
the third gate bias voltage connector is connected to the first gate bias voltage connector; and
the third drain bias voltage connector is connected to the first drain bias voltage connector.

8 . The package of claim 7 further comprising:
a first decoupling capacitor coupled between the first gate bias voltage connector and RF signal ground; and
a second decoupling capacitor coupled between the first drain bias voltage connector and RF signal ground.

9 . The package of claim 1 , wherein:
the first amplifier circuit comprises a first dual-stage amplifier comprising a first amplifier stage having source, gate, and drain terminals, and a second amplifier stage having source, gate, and drain terminals, wherein
the source terminals of both amplifier stages are connected to RF signal ground;
the gate terminal of the first amplifier stage is the gate terminal of the first amplifier circuit;
the gate terminal of the first amplifier stage is the gate terminal of the first amplifier stage; and
the drain terminal of the second amplifier stage is the drain terminal of the first amplifier circuit;
the first gate bias voltage connector is coupled to the gate terminal of one of the first and second amplifier stages of the first amplifier circuit; and the first drain bias voltage connector is coupled to the drain terminal of one of the first and second amplifier stages of the first amplifier circuit; a second gate bias voltage connector is coupled to the gate terminal of the other of the first and second amplifier stages of the first amplifier circuit; and a second drain bias voltage connector is coupled to the drain terminal of the other of the first and second amplifier stages of the first amplifier circuit.

10 . The package of claim 9 wherein at least one of:
the first and second gate bias voltage connectors are disposed on either side of the first RF input connector; and
the first and second drain bias voltage connectors are disposed on either side of the first RF output connector.

11 . The package of claim 9 further comprising:
a second amplifier circuit having source, gate, and drain terminals, the source terminal connected to RF signal ground, wherein the second amplifier circuit comprises a second dual-stage amplifier comprising a first amplifier stage having source, gate, and drain terminals, and a second amplifier stage having source, gate, and drain terminals, wherein
the source terminals of both amplifier stages are connected to RF signal ground;
the gate terminal of the first amplifier stage is the gate terminal of the second amplifier circuit;
the drain terminal of the second amplifier stage is the drain terminal of the second amplifier circuit; and
the drain terminal of the first amplifier stage is connected to the gate terminal of the second amplifier stage;

a second RF input connector connected to the second amplifier circuit gate terminal;
a second RF output connector connected to the second amplifier circuit drain terminal;
a third gate bias voltage connector coupled to the gate terminal of one of the first and second amplifier stages of the second amplifier circuit;
a fourth gate bias voltage connector coupled to the gate terminal of the other of the first and second amplifier stages of the second amplifier circuit;
a third drain bias voltage connector coupled to the drain terminal of one of the first and second amplifier stages of the second amplifier circuit; and
a fourth drain bias voltage connector is coupled to the drain terminal of the other of the first and second amplifier stages of the second amplifier circuit.

12 . The package of claim 11 wherein at least one of:
the third and fourth gate bias voltage connectors are disposed on either side of the second RF input connector; and
the third and fourth drain bias voltage connectors are disposed on either side of the second RF output connector.

13 . A method of fabricating an electronic circuit package housing one or more amplifier circuits, comprising:
placing a first amplifier circuit having source, gate, and drain terminals, the source terminal connected to Radio Frequency (RF) signal ground; connecting a first RF input connector to the first amplifier circuit gate terminal; connecting a first RF output connector to the first amplifier circuit drain terminal; coupling a first gate bias voltage connector to the gate terminal of the first amplifier circuit; coupling a first drain bias voltage connector to the drain terminal of the first amplifier circuit; and connecting at least one of
a second gate bias voltage connector to the first gate bias voltage connector; and
a second drain bias voltage connector to the first drain bias voltage connector;

14 . The method of claim 13 wherein the parallel connections of the first and second gate bias voltage connectors or drain bias voltage connectors reduce the effective respective gate or drain bias feed inductance, relative to one respective gate or drain bias voltage connector.

15 . The method of claim 13 , wherein either one or both of
the first and second ga

Assignees

• Cree Inc

Inventors

• Chidurala Madhu
• Marbell Marvin
• Ward Simon

Classifications

• H10W44/231

  Arrangements for applying bias · CPC title

• H10W44/20 Primary

  at high-frequency [HF] or radio frequency [RF] · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F2200/387

  A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier · CPC title

• H03F2200/222

  A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier · CPC title