Envelope tracking amplifier apparatus incorporating single-wire peer-to-peer bus

US2020366248A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2020366248-A1
Application numberUS-201916675366-A
CountryUS
Kind codeA1
Filing dateNov 6, 2019
Priority dateMay 14, 2019
Publication dateNov 19, 2020
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An envelope tracking (ET) amplifier apparatus is provided. The ET amplifier apparatus includes an ET integrated circuit (ETIC) and a distributed ETIC (DETIC) coupled to a single-wire bus that correspond to a first bus access priority and a second bus access priority, respectively. The ETIC and the DETIC can contend for access to the single-wire bus by asserting a bus contention indication(s) when the single-wire bus is in a defined bus state configured to permit bus contention. In a non-limiting example, a winner for the single-wire bus is a peer device having a highest bus access priority between the ETIC and the DETIC. In this regard, each of the ETIC and the DETIC can have a chance to initiate communications over the single-wire bus, thus making it possible for the single-wire bus to function based on bidirectional peer-to-peer (P2P) bus architecture capable of supporting more application and/or deployment scenarios.

First claim

Opening claim text (preview).

What is claimed is: 1 . An envelope tracking (ET) amplifier apparatus comprising: an ET integrated circuit (ETIC) coupled to a single-wire bus and corresponding to a first bus access priority; and a distributed ETIC (DETIC) coupled to the single-wire bus and corresponding to a second bus access priority lower than the first bus access priority; wherein at least one of the ETIC and the DETIC is configured to: assert a bus contention indication when the single-wire bus is in a defined bus state configured to permit bus contention; determine whether the bus contention indication is successful based on the first bus access priority and the second bus access priority; and communicate over the single-wire bus in response to the bus contention indication being successful. 2 . The ET amplifier apparatus of claim 1 further comprising the single-wire bus. 3 . The ET amplifier apparatus of claim 1 wherein the defined bus state corresponds to an idle state configured to enable communication between the ETIC and the DETIC. 4 . The ET amplifier apparatus of claim 1 wherein the ETIC and the DETIC are provided in different dies. 5 . The ET amplifier apparatus of claim 1 configured to maintain the single-wire bus at a bus voltage during the defined bus state. 6 . The ET amplifier apparatus of claim 5 wherein the at least one of the ETIC and the DETIC is further configured to assert the bus contention indication by pulling down the bus voltage of the single-wire bus to a predefined threshold and subsequently restoring the single-wire bus to the bus voltage. 7 . The ET amplifier apparatus of claim 1 wherein: the ETIC comprises: a primary output port; an auxiliary output port; an ET voltage circuit configured to generate an ET modulated voltage at the primary output port; a tracker circuit configured to generate a low-frequency current; a switching circuit coupled to the tracker circuit, the primary output port, and the auxiliary output port; and an ETIC controller configured to selectively couple the tracker circuit to the primary output port or the auxiliary output port; and the DETIC comprises: a distributed ET voltage circuit configured to generate a distributed ET modulated voltage; a low-dropout (LDO) regulator configured to generate a distributed low-frequency current; and a DETIC controller. 8 . The ET amplifier apparatus of claim 7 further comprising a primary amplifier circuit coupled to the primary output port and configured to amplify a primary radio frequency (RF) signal based on the ET modulated voltage. 9 . The ET amplifier apparatus of claim 8 wherein the primary RF signal is a cellular communication signal selected from the group consisting of: a long-term evolution (LTE) communication signal and a fifth-generation new-radio (5G-NR) communication signal. 10 . The ET amplifier apparatus of claim 8 further comprising an auxiliary amplifier circuit coupled to the DETIC and the auxiliary output port and configured to amplify an auxiliary RF signal based on the distributed ET modulated voltage. 11 . The ET amplifier apparatus of claim 10 wherein the auxiliary RF signal is a Wi-Fi communication signal. 12 . The ET amplifier apparatus of claim 10 wherein the DETIC is configured to: determine that the auxiliary amplifier circuit is active to amplify the auxiliary RF signal; assert a respective bus contention indication when the single-wire bus is in the defined bus state; and communicate one or more protocol telegrams to the ETIC over the single-wire bus to request to draw the low-frequency current from the tracker circuit in response to the respective bus contention indication being successful. 13 . The ET amplifier apparatus of claim 12 wherein the DETIC controller is configured to activate the LDO regulator to provide the distributed low-frequency current to the auxiliary amplifier circuit in response to the respective bus contention indication being unsuccessful. 14 . The ET amplifier apparatus of claim 13 wherein the DETIC is further configured to re-assert the respective bus contention indication when the single-wire bus is in the defined bus state again in response to the respective bus contention indication being unsuccessful. 15 . The ET amplifier apparatus of claim 12 wherein: the ETIC controller is further configured to: determine that the primary amplifier circuit is inactive; control the switching circuit to couple the tracker circuit to the auxiliary output port to provide the low-frequency current to the auxiliary amplifier circuit; and notify the DETIC controller via the single-wire bus that the request to draw the low-frequency current is granted; and the DETIC controller is configured to deactivate the LDO regulator. 16 . The ET amplifier apparatus of claim 12 wherein: the ETIC controller is further configured to: determine that the primary amplifier circuit is active; control the switching circuit to couple the tracker circuit to the primary output port to provide the low-frequency current to the primary amplifier circuit; and notify the DETIC controller via the single-wire bus that the request to draw the low-frequency current is declined; and the DETIC controller is configured to activate the LDO regulator to provide the distributed low-frequency current to the auxiliary amplifier circuit. 17 . The ET amplifier apparatus of claim 16 wherein the DETIC is further configured to re-assert the respective bus contention indication when the single-wire bus is in the defined bus state again in response to the ETIC declining the request to draw the low-frequency current from the ETIC. 18 . The ET amplifier apparatus of claim 10 wherein the ETIC is configured to: determine that the primary amplifier circuit becomes active to amplify the primary RF signal while the auxiliary amplifier circuit is drawing the low-frequency current from the tracker circuit; assert a respective bus contention indication when the single-wire bus is in the defined bus state; and communicate one or more protocol telegrams to the DETIC over the single-wire bus to stop the auxiliary amplifier circuit from drawing the low-frequency current from the tracker circuit in response to the respective bus contention indication being successful. 19 . The ET amplifier apparatus of claim 18 wherein the ETIC is further configured to re-assert the respective bus contention indication when the single-wire bus is in the defined bus state again in response to the respective bus contention indication being unsuccessful. 20 . The ET amplifier apparatus of claim 18 wherein: the ETIC controller is further configured to control the switching circuit to couple the tracker circuit to the primary output port to provide the low-frequency current to the primary amplifier circuit; and the DETIC controller is configured to activate the LDO regulator to provide the distributed low-frequency current to the auxiliary amplifier circuit.

Assignees

Inventors

Classifications

  • Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title

  • H03F1/0277Primary

    Selecting one or more amplifiers from a plurality of amplifiers · CPC title

  • using a combination of several amplifiers (H03F3/60 takes precedence) · CPC title

  • A non-specified detector of a signal envelope being used in an amplifying circuit · CPC title

  • by using a signal derived from the input signal · CPC title

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What does patent US2020366248A1 cover?
An envelope tracking (ET) amplifier apparatus is provided. The ET amplifier apparatus includes an ET integrated circuit (ETIC) and a distributed ETIC (DETIC) coupled to a single-wire bus that correspond to a first bus access priority and a second bus access priority, respectively. The ETIC and the DETIC can contend for access to the single-wire bus by asserting a bus contention indication(s) wh…
Who is the assignee on this patent?
Qorvo Us Inc
What technology area does this patent fall under?
Primary CPC classification H03F1/0277. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Nov 19 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).