Magnetic memory device, and manufacturing method of magnetic memory device
US-2024315049-A1 · Sep 19, 2024 · US
Seed layers for a non-volatile memory element
US2020357984A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2020357984-A1 |
| Application number | US-201916407661-A |
| Country | US |
| Kind code | A1 |
| Filing date | May 9, 2019 |
| Priority date | May 9, 2019 |
| Publication date | Nov 12, 2020 |
| Grant date | — |
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Abstract
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Structures for a non-volatile memory element and methods of fabricating a structure for a non-volatile memory element. The structure includes a bottom electrode, a seed layer on the bottom electrode, and a magnetic-tunneling-junction layer stack on the seed layer. The seed layer is composed of a nickel-chromium-ruthenium alloy including ruthenium in an amount ranging from seven atomic percent by weight to eighty-four atomic percent by weight.
First claim
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1 . A structure for a non-volatile memory element, the structure comprising: a bottom electrode; a seed layer on the bottom electrode; and a magnetic-tunneling-junction layer stack on the seed layer, wherein the seed layer is comprised of a nickel-chromium-ruthenium alloy including ruthenium in an amount ranging from seven atomic percent by weight to eighty-four atomic percent by weight. 2 . The structure of claim 1 wherein the seed layer has a thickness ranging from about two nanometers to about ten nanometers. 3 . (canceled) 4 . The structure of claim 1 wherein the seed layer is a single layer of material with a substantially uniform composition of nickel, chromium, and ruthenium. 5 . The structure of claim 1 wherein the seed layer is a single layer of material. 6 . The structure of claim 1 wherein the seed layer has a substantially uniform composition of nickel, chromium, and ruthenium. 7 . The structure of claim 1 further comprising: a field-effect transistor having a drain connected with the bottom electrode. 8 . The structure of claim 7 further comprising: a metallization level over the field-effect transistor, wherein the seed layer, the bottom electrode, and the magnetic-tunneling-junction layer stack are arranged in the metallization level. 9 . The structure of claim 1 wherein the magnetic-tunneling-junction layer stack further includes a fixed layer, a free layer, and a tunneling barrier layer arranged in a vertical direction between the fixed layer and the free layer. 10 . The structure of claim 1 wherein the seed layer only includes trace elements in addition to nickel, chromium, and ruthenium. 11 . The structure of claim 1 wherein the seed layer consists of nickel, chromium, and ruthenium. 12 . The structure of claim 1 wherein the seed layer consists essentially of nickel, chromium, and ruthenium. 13 . The structure of claim 1 wherein the magnetic-tunneling-junction layer stack is arranged directly on the seed layer. 14 . A method of forming a non-volatile memory element, the method comprising: forming a bottom electrode; depositing a seed layer on the bottom electrode; and forming a magnetic-tunneling-junction layer stack on the seed layer, wherein the seed layer is comprised of a nickel-chromium-ruthenium alloy including ruthenium in an amount ranging from seven atomic percent by weight to eighty-four atomic percent by weight. 15 . (canceled) 16 . The method of claim 14 wherein the seed layer is deposited as a single layer of material with a substantially uniform composition of nickel, chromium, and ruthenium. 17 . The method of claim 14 further comprising: forming a field-effect transistor having a drain connected with the bottom electrode. 18 . The method of claim 17 further comprising: forming a metallization level over the field-effect transistor, wherein the seed layer, the bottom electrode, and the magnetic-tunneling-junction layer stack are arranged in the metallization level. 19 . The method of claim 14 wherein the magnetic-tunneling-junction layer stack further includes a fixed layer, a free layer, and a tunneling barrier layer arranged in a vertical direction between the fixed layer and the free layer. 20 . The method of claim 14 wherein the magnetic-tunneling-junction layer stack is arranged directly on the seed layer. 21 . The structure of claim 1 wherein the nickel-chromium-ruthenium alloy includes ruthenium in an amount ranging from forty atomic percent by weight to seventy-eight atomic percent by weight. 22 . The method of claim 14 wherein the nickel-chromium-ruthenium alloy includes ruthenium in an amount ranging from forty atomic percent by weight to seventy-eight atomic percent by weight.
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- What does patent US2020357984A1 cover?
- Structures for a non-volatile memory element and methods of fabricating a structure for a non-volatile memory element. The structure includes a bottom electrode, a seed layer on the bottom electrode, and a magnetic-tunneling-junction layer stack on the seed layer. The seed layer is composed of a nickel-chromium-ruthenium alloy including ruthenium in an amount ranging from seven atomic percent b…
- Who is the assignee on this patent?
- Globalfoundries Sg Pte Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10N50/85. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Thu Nov 12 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).