Semiconductor device and semiconductor device manufacturing method

Patent metadata

Field	Value
Publication number	US-2020357882-A1
Application number	US-201816963751-A
Country	US
Kind code	A1
Filing date	Feb 13, 2018
Priority date	Feb 13, 2018
Publication date	Nov 12, 2020
Grant date	—

Abstract

A semiconductor device includes: a drift layer of a first conductivity type which is made of silicon carbide; a junction region formed on one main surface of the drift layer; a junction termination extended region of the drift layer, the junction termination extended region being formed outside the junction region when the one main surface is viewed in plan view, and the junction termination extended region containing an impurity of a second conductivity type opposite to the first conductivity type; and a guard ring region of the drift layer, the guard ring region being formed at a position overlapping the junction termination extended region when the one main surface is viewed in plan view, and the guard ring region containing the impurity of the second conductivity type with a concentration that is higher than that of the junction termination extended region, wherein in the junction termination extended region, the concentration of the impurity of the second conductivity type in a depth direction from the one main surface increases from the one main surface down to a first depth, and the concentration of the impurity of the second conductivity type at the one main surface is one tenth or less the concentration of the impurity of the second conductivity type at the first depth and is higher than a concentration of an impurity of the first conductivity type of the drift layer.

First claim

1 . A semiconductor device comprising:
a drift layer of a first conductivity type which is made of silicon carbide; a junction region formed on one main surface of the drift layer; a junction termination extended region of the drift layer, the junction termination extended region being formed outside the junction region when the one main surface is viewed in plan view, and the junction termination extended region containing an impurity of a second conductivity type opposite to the first conductivity type; and a guard ring region of the drift layer, the guard ring region being formed at a position overlapping the junction termination extended region when the one main surface is viewed in plan view, and the guard ring region containing the impurity of the second conductivity type with a concentration that is higher than that of the junction termination extended region, wherein in the junction termination extended region, the concentration of the impurity of the second conductivity type in a depth direction from the one main surface increases from the one main surface down to a first depth, the concentration of the impurity of the second conductivity type at the one main surface is one tenth or less the concentration of the impurity of the second conductivity type at the first depth and is higher than a concentration of an impurity of the first conductivity type of the drift layer, and a concentration distribution of the impurity of the second conductivity type in the depth direction from the one main surface has two peaks.

2 . (canceled)

3 . The semiconductor device according to claim 1 , wherein
the semiconductor device is a Schottky diode.

4 . The semiconductor device according to claim 1 ,
the semiconductor device is a MOSFET.

5 . The semiconductor device according to claim 1 , wherein
the semiconductor device is an IGBT.

6 . A semiconductor device manufacturing method comprising:
a semiconductor substrate preparation step of preparing a semiconductor substrate including a drift layer of a first conductivity type which is made of silicon carbide; a junction region formation step of forming a junction region on one main surface of the drift layer; a junction termination extended region formation step of introducing from the one main surface into the drift layer, an impurity of a second conductivity type opposite to the first conductivity type, thus forming a junction termination extended region outside the junction region when the one main surface is viewed in plan view; and a guard ring region formation step of introducing from the one main surface into the drift layer, the impurity of the second conductivity type with a concentration that is higher than that of the junction termination extended region, thus forming a guard ring region at a position overlapping the junction termination extended region when the one main surface is viewed in plan view, wherein in the junction termination extended region formation step, the junction termination extended region is formed so that the concentration of the impurity of the second conductivity type in a depth direction from the one main surface increases from the one main surface down to a first depth, the concentration of the impurity of the second conductivity type at the one main surface is one tenth or less the concentration of the impurity of the second conductivity type at the first depth and is higher than a concentration of an impurity of the first conductivity type of the drift layer, and a concentration distribution of the impurity of the second conductivity type in the depth direction from the one main surface has two peaks.

7 . The semiconductor device manufacturing method according to claim 6 , wherein in the guard ring region formation step, the impurity of the second conductivity type is introduced into the drift layer by ion implantation.

Assignees

• Shindengen Electric Mfg

Inventors

• Shibukawa Akihiko
• Maeyama Yusuke
• Nakamura Shunichi

Classifications

• H10D62/8325

  Silicon carbide · CPC title

• H10D8/60 Primary

  Schottky-barrier diodes · CPC title

• H10D12/441

  Vertical IGBTs · CPC title

• H10D62/60

  Impurity distributions or concentrations · CPC title

• H10D62/126

  Top-view geometrical layouts of the regions or the junctions · CPC title