Display panel and manufacturing method of the same

US2020335560A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2020335560-A1
Application numberUS-202016843368-A
CountryUS
Kind codeA1
Filing dateApr 8, 2020
Priority dateApr 16, 2019
Publication dateOct 22, 2020
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A display panel includes: a base substrate; a circuit layer on the base substrate; and a display element layer on the circuit layer, wherein the circuit layer includes an active layer on the base substrate and containing boron and fluorine; a control electrode on the active layer; and a control electrode insulation layer between the active layer and the control electrode, wherein the active layer includes: a core layer in which a concentration of the boron is greater than a concentration of the fluorine; and a surface layer on the core layer and in which a concentration of the fluorine is greater than a concentration of the boron.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display panel comprising: a base substrate; a circuit layer on the base substrate; and a display element layer on the circuit layer, wherein the circuit layer includes an active layer on the base substrate and containing boron and fluorine; a control electrode on the active layer; and a control electrode insulation layer between the active layer and the control electrode, wherein the active layer includes: a core layer in which a concentration of the boron is greater than a concentration of the fluorine; and a surface layer on the core layer and in which a concentration of the fluorine is greater than a concentration of the boron. 2 . The display panel of claim 1 , wherein the surface layer comprises a first surface layer adjacent to the control electrode insulation layer and a second surface layer adjacent to the base substrate. 3 . The display panel of claim 2 , wherein the concentration of the fluorine in each of the first surface layer and the second surface layer is greater than the concentration of the fluorine in the core layer. 4 . The display panel of claim 1 , wherein a thickness of the surface layer compared to a total thickness of the active layer is 10% to 30%. 5 . The display panel of claim 1 , wherein the base substrate is a polyimide substrate. 6 . The display panel of claim 1 , wherein the active layer comprises: a channel region overlapping the control electrode; and a first ion doping region and a second ion doping region respectively located at both sides of the channel region, wherein the concentration of the boron in each of the first ion doping region and the second ion doping region is greater than the concentration of the boron in the channel region. 7 . The display panel of claim 6 , wherein the circuit layer further comprises: an input electrode connected to the first ion doping region; and an output electrode connected to the second ion doping region. 8 . The display panel of claim 7 , wherein the display element layer comprises: a first electrode electrically connected to the output electrode; a second electrode facing the first electrode; and a light emitting layer between the first electrode and the second electrode. 9 . The display panel of claim 1 , wherein the display element layer comprises an organic electroluminescent element or a quantum dot light emitting element. 10 . The display panel of claim 1 , further comprising a buffer layer between the base substrate and the active layer. 11 . A display panel including at least one folding region, the display panel comprising: a base substrate; a circuit layer on the base substrate; and a display element layer on the circuit layer and including a light emitting element, wherein the circuit layer includes: an active layer on the base substrate and containing boron and fluorine; a control electrode on the active layer; and a control electrode insulation layer between the active layer and the control electrode, wherein a concentration of the fluorine at a surface of the active layer adjacent to the control electrode insulation layer is greater than a concentration of the fluorine in a core portion of the active layer. 12 . The display panel of claim 11 , wherein the active layer comprises: a channel region overlapping the control electrode; and a first ion doping region and a second ion doping region respectively located at both sides of the channel region, wherein a concentration of the boron in each of the first ion doping region and the second ion doping region is greater than a concentration of the boron in the channel region. 13 . The display panel of claim 11 , wherein the base substrate comprises polyimide. 14 . A method for manufacturing a display panel, the method comprising: forming a circuit layer and forming a display element layer, wherein forming the circuit layer includes: providing a preliminary active layer containing amorphous silicon on a base substrate; doping the preliminary active layer with first ions; doping the doped preliminary active layer with second ions different from the first ions; forming an active layer by providing laser light to the doped preliminary active layer; providing a control electrode insulation layer on the active layer; forming a control electrode on the control electrode insulation layer; tertiary doping the active layer with the first ions; and heat treating the active layer. 15 . The method of claim 14 , wherein the first ions are boron ions and the second ions are fluorine ions. 16 . The method of claim 14 , wherein providing the preliminary active layer includes depositing the amorphous silicon. 17 . The method of claim 14 , wherein forming the active layer by providing laser light comprises forming polycrystalline silicon by providing the laser light to the amorphous silicon. 18 . The method of claim 14 , wherein doping the active layer comprises using the control electrode as a mask to form an ion doping region not overlapping the control electrode. 19 . The method of claim 14 , wherein heat treating the active layer includes activating the active layer by providing heat of 250° C. to 480° C. 20 . The method of claim 14 , wherein the base substrate comprises polyimide.

Assignees

Inventors

Classifications

  • by ion implantation · CPC title

  • being group IV material · CPC title

  • using laser beams · CPC title

  • comprising silicon, e.g. amorphous silicon or polysilicon · CPC title

  • characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2020335560A1 cover?
A display panel includes: a base substrate; a circuit layer on the base substrate; and a display element layer on the circuit layer, wherein the circuit layer includes an active layer on the base substrate and containing boron and fluorine; a control electrode on the active layer; and a control electrode insulation layer between the active layer and the control electrode, wherein the active lay…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D86/481. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Oct 22 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).