Current sensing for monitoring load current in a buck power converter

Patent metadata

Field	Value
Publication number	US-2020292586-A1
Application number	US-201916354659-A
Country	US
Kind code	A1
Filing date	Mar 15, 2019
Priority date	Mar 15, 2019
Publication date	Sep 17, 2020
Grant date	—

Abstract

The disclosure describes techniques for measuring the average output current of a power converter circuit by determining peaks valleys in the output current. A current monitoring circuit may include an averaging unit, which may sample the output current during a current peak as well as during a current valley. During a hold phase the averaging unit may output a signal proportional to the average output current based on the sampled peak current and sampled valley current. In some examples, the averaging unit may include three functional units. A first unit may be configured to determine the output current, a second block may be configured to hold the previously determined peak current and a third block may be configured to hold the previously determined valley current. In this manner the averaging unit may continuously output a signal proportional to the average output current of the power converter.

First claim

1 . A circuit comprising a first current sampling unit, a second current sampling unit, and an output unit, the circuit configured to:
sample an input current during a first phase of a first time period with the first current sampling unit; sample the input current during a first phase of a second time period with the second current sampling unit, wherein the first phase of the first time period does not overlap the first phase of the second time period; during a second phase of the first time period, provide a first current to the output unit from the first current sampling unit, wherein the first current defines a magnitude that is based on the input current during the first phase of the first time period; during a second phase of the second time period, provide a second current to the output unit from the second current sampling unit, wherein the second current defines a magnitude that is based on the input current during the first phase of the second time period; and output a signal from the output unit, wherein the signal is based on the first current and the second current.

2 . The circuit of claim 1 , wherein the signal from the output unit is proportional to an average of:
the magnitude of the input current of the first sampling unit; and a magnitude of the input current of the second sampling unit.

3 . The circuit of claim 2 , wherein the signal comprises a voltage.

4 . The circuit of claim 2 , wherein the signal comprises a current.

5 . The circuit of claim 1 , wherein the magnitude of the input current comprises a periodic signal, wherein each period of the periodic signal comprises a current peak and a current valley.

6 . The circuit of claim 5 , further comprising a third current sampling unit, the circuit further configured to:
sample the input current during a first phase of a third time period with the third current sampling unit,
wherein the first phase of the third time period does not overlap the first phase of the first time period nor the first phase of the second time period,
wherein during the first phase of the third time period:
the first current sampling unit provides the first current to the output unit, wherein the magnitude of the first current defines the current peak, and
the second current sampling unit provides the second current to the output unit wherein the magnitude of the second current defines the current valley.

7 . The circuit of claim 6 ,
wherein the output unit is configured to continuously output the signal, and wherein the signal from the output unit is proportional to an average of the magnitude of the input current.

8 . The circuit of claim 6 , wherein the first current sampling unit, the second current sampling unit and the third current sampling unit each comprise:
a current mirror including a first transistor and a second transistor, the current mirror configured to:
sample an input current during the first phase;
copy a magnitude of the input current during the first phase;
output from the first transistor a current comprising the magnitude of the input current during the second phase; and
an error amplifier configured to keep a drain-source voltage of the first transistor approximately equal to a gate-source voltage of the first transistor during the second phase.

9 . A method comprising:
sampling, with a first current sampling unit of a current monitoring circuit, an input current during a first phase of a first time period; sampling, with a second current sampling unit of the current monitoring circuit, the input current during a first phase of a second time period, wherein the first phase of the first time period does not overlap the first phase of the second time period; during a second phase of the first time period, providing, by the first current sampling unit, a first current to an output unit of the current monitoring circuit, wherein the first current defines a magnitude that is based on the input current during the first phase of the first time period; during a second phase of the second time period, providing, by the second current sampling unit, a second current to the output unit from the second current sampling unit, wherein the second current defines a magnitude that is based on the input current during the first phase of the second time period; and outputting a signal from the output unit, wherein the signal is based on the first current and the second current.

10 . The method of claim 9 , wherein the signal from the output unit is proportional to an average of:
the magnitude of the input current of the first sampling unit; and a magnitude of the input current of the second sampling unit.

11 . The method of claim 9 , wherein the magnitude of the input current comprises a periodic signal, wherein each period of the periodic signal comprises a current peak and a current valley.

12 . The method of claim 11 , further comprising:
sampling, by a third current sampling unit of the current monitoring circuit, the input current during a first phase of a third time period with the third current sampling unit, wherein the first phase of the third time period does not overlap the first phase of the first time period nor the first phase of the second time period, wherein during the first phase of the third time period:
providing, by the first current sampling unit the first current to the output unit, wherein the magnitude of the first current comprises the current peak, and
providing, by the second current sampling unit, the second current to the output unit wherein the magnitude of the second current comprises the current valley.

13 . The method of claim 12 , wherein the first current sampling unit, the second current sampling unit and the third current sampling unit each comprise:
a current mirror comprising a first transistor and a second transistor, the current mirror configured to:
sample an input current during the first phase;
copy a magnitude of the input current during the first phase;
output from the first transistor a current comprising the magnitude of the input current during the second phase; and

an error amplifier configured to keep a drain-source voltage of the first transistor approximately equal to the gate-source voltage of a first transistor during the second phase.

14 . A system comprising:
a power converter circuit; a current monitoring circuit comprising:
a current sense unit configured to mirror an output current of the power converter circuit; and
an averaging unit comprising a first current sampling unit, a second current sampling unit, and an output unit, the averaging unit configured to:
receive the mirrored current from the current sense unit as an input current;
sample the input current during a first phase of a first time period with the first current sampling unit;
sample the input current during a first phase of a second time period with the second current sampling unit, wherein the first phase of the first time period does not overlap the first phase of the second time period;
during a second phase of the first time period, provide a first current to the output unit from the first current sampling unit, wherein the first current defines a magnitude that is based on the input current during the first phase of the first time period;
during a second phase of the second time period, provide a second current to the output unit from the second current sampling unit, wherein the second current defines a magnitude that is based on the input current during the first phase of the second time period; and
output a signal from the output unit, wherein the signal is based on

Assignees

• Infineon Technologies Ag

Inventors

• Loccia Giuseppe
• Flaibani Marco

Classifications

• H02M3/158

  including plural semiconductor devices as final control devices for a single load · CPC title

• H02M1/0009

  Devices or circuits for detecting current in a converter · CPC title

• G01R19/04 Primary

  Measuring peak values {or amplitude or envelope} of AC or of pulses · CPC title

• G01R19/003 Primary

  Measuring mean values of current or voltage during a given time interval · CPC title

• H02M3/1582

  Buck-boost converters (H02M3/1584 takes precedence) · CPC title