Test method and test system

Patent metadata

Field	Value
Publication number	US-2020284839-A1
Application number	US-201916295337-A
Country	US
Kind code	A1
Filing date	Mar 7, 2019
Priority date	Mar 7, 2019
Publication date	Sep 10, 2020
Grant date	—

Abstract

The present invention provides an improved testing of a complex device under test, in particular a parallel analysis of signals of a device under test. Multiple signals of the device under test may be acquired and characteristic parameters of the acquired signals may be determined. The determined characteristic parameters of the multiple signals may be stored. In particular, the characteristic parameters may be stored in form of an array, table or spread sheet.

First claim

1 . A test method for testing a device under test, the test method comprising:
acquiring a sequence of at least two signals of the device under test; determining characteristic parameters for each signal in the acquired sequence; and storing the determined characteristic parameters in a measurement memory.

2 . The method of claim 1 , wherein determining the characteristic parameters comprises determining a temporal relationship between the at least two signals in the acquired sequence.

3 . The method of claim 1 , comprising displaying the characteristic parameters of the acquired sequence in form of an array, table or spreadsheet.

4 . The method of claim 1 , wherein the acquiring comprises acquiring a sequence of at least four, particularly eight, signals of the device under test.

5 . The method of claim 1 , comprising storing specifications of the device under test in a specification memory.

6 . The method of claim 5 , wherein the characteristic parameters comprise at least one of a minimum value, maximum value, average value, phase shift, rising or falling time, pulse width, duty cycle, periodic length, frequency, frequency spectrum, shape of a waveform, delay between signals or monotonicity properties.

7 . The method of claim 5 , comprising associating the determined characteristic parameters of the acquired signal sequence with related specifications of the device under test.

8 . The method of claim 7 , comprising displaying the characteristic parameters of the acquired sequence and the associated specifications of the device under test on a display.

9 . The method of claim 5 , comprising comparing the characteristic parameters of the acquired sequence and corresponding specifications of the device under test.

10 . The method of claim 9 , comprising displaying a result of the comparison between the characteristic parameters of the acquired sequence and corresponding specifications of the device under test.

11 . The method of claim 10 , wherein the result of the comparison is displayed in form of an array, table or spreadsheet.

12 . The method of claim 9 , comprising generating a schematic representation of a waveform signal based on the characteristic parameters, the specifications of the device under test and/or the result of the comparison between the characteristic parameters of the acquired sequence and corresponding specifications of the device under test.

13 . A test system for testing a device under test, the test system comprising:
a processor for acquiring a sequence of at least two signals of the device under test and determining characteristic parameters in each of the acquired at least two signals; and a measurement memory for storing the determined characteristic parameters.

14 . The test system of claim 13 , comprising a display for displaying the characteristic parameters of the acquired sequence in form of an array, table or spreadsheet.

15 . The test system of claim 13 , comprising a specification memory for storing specifications of the device under test in a specification memory.

16 . The test system of claim 15 , wherein the characteristic parameters comprise at least one of a minimum value, maximum value, average value, phase shift, rising or falling time, pulse width, duty cycle, periodic length, frequency, frequency spectrum, shape of a waveform, delay between signals or monotonicity properties.

17 . The test system of claim 15 , wherein the processor is configured to associate the determined characteristic parameters of the acquired signal sequence with related specifications of the device under test.

18 . The test system of claim 15 , the processor is configured to compare the characteristic parameters of the acquired sequence and corresponding specifications of the device under test.

19 . The test system of claim 15 , comprising a display for displaying the characteristic parameters of the acquired sequence and the associated specifications of the device under test.

20 . The test system of claim 18 , comprising generating a schematic representation of a waveform signal based on the characteristic parameters, the specifications of the device under test and/or the result of the comparison between the characteristic parameters of the acquired sequence and corresponding specifications of the device under test.

Assignees

• Rohde & Schwarz

Inventors

• Diegmann Philip

Classifications

• G01R31/31912

  Tester/user interface · CPC title

• G01R31/31908

  Tester set-up, e.g. configuring the tester to the device under test [DUT], down loading test patterns · CPC title

• G01R31/31905

  Interface with the device under test [DUT], e.g. arrangements between the test head and the DUT, mechanical aspects, fixture · CPC title

• G01R31/319

  Tester hardware, i.e. output processing circuits · CPC title

• G01R31/318583

  Design for test · CPC title