Copper pillars having improved integrity and methods of making the same

Patent metadata

Field	Value
Publication number	US-2020266165-A1
Application number	US-202016866709-A
Country	US
Kind code	A1
Filing date	May 5, 2020
Priority date	Feb 21, 2018
Publication date	Aug 20, 2020
Grant date	—

Abstract

The copper pillars have improved integrity such that they can readily withstand the harsh reflow conditions of post solder bump application without readily failing. The method of making the copper pillars having the improved integrity involves a two-step electroplating process of varying current densities.

First claim

1 - 3 . (canceled)

4 : A method of electroplating copper pillars comprising:
a) providing a substrate comprising a layer of photoresist, wherein the layer of photoresist comprises a plurality of apertures; b) providing a first copper electroplating bath comprising one or more sources of copper ions, one or more acids, one or more sources of chloride, one or more levelers, one or more accelerators; and one or more suppressors; c) immersing the substrate comprising the layer of photoresist with the plurality of apertures in the first copper electroplating bath; d) electroplating a first section of a copper pillar in each of the plurality of apertures at a first current density followed by electroplating a second section of the copper pillar in each of the plurality of apertures at a lower current density than the first current density with the first copper electroplating bath or, in the alternative, electroplating the second section of the copper pillar in each of the plurality of apertures at the lower current density with a second copper electroplating bath consisting of water, one or more sources of copper ions, one or more acids, and, optionally, one or more sources of chloride, one or more levelers, one or more accelerators and one more suppressors; e) depositing a tin or tin alloy solder bump on a top of the second section of each copper pillar; f) stripping the photoresist from the substrate leaving an array of copper pillars with tin or tin alloy solder bumps on the top of the second section of each copper pillar; and g) reflow the array.

5 : The method of claim 4 , wherein the first current density is greater than 10 ASD.

6 : The method of claim 4 , wherein the second current density is 10 ASD or less.

Assignees

• Rohm & Haas Elect Mat

Inventors

• Pokhrel Ravi
• Gallagher Michael K

Classifications

• H10W72/0198

  batch processes · CPC title

• H10W72/222

  Multilayered bumps, e.g. a coating on top and side surfaces of a bump core · CPC title

• H10W72/224

  Bumps having multiple side-by-side cores · CPC title

• H10W72/232

  Plan-view shape, i.e. in top view · CPC title

• H10W72/01257

  by reflowing · CPC title