Magnetic tunnel junction device

US2020259077A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2020259077-A1
Application numberUS-202016862598-A
CountryUS
Kind codeA1
Filing dateApr 30, 2020
Priority dateMar 12, 2004
Publication dateAug 13, 2020
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.

First claim

Opening claim text (preview).

1 - 2 . (canceled) 3 . A method of manufacturing a magnetoresistive random access memory (MRAM) comprising memory cells disposed at intersections of word lines and bit lines, each of the memory cells comprising a transistor connected with one of the word lines and a magnetic tunnel junction (MTJ) device connected with one of the bit lines, the method comprising: forming a first CoFeB layer of the MTJ devices, the first CoFeB layer being amorphous; forming a magnesium oxide (MgO) layer of the MTJ devices over the first CoFeB layer; forming a second CoFeB layer of the MTJ devices, the second CoFeB layer being amorphous over the MgO layer; and annealing the MTJ devices, wherein the first and second CoFeB layers are crystallized by the annealing, and wherein the MgO layer is poly-crystalline in which a (001) crystal plane is preferentially oriented. 4 . The method of claim 3 , wherein after the annealing, the first and second CoFeB layers are entirely crystallized. 5 . The method of claim 3 , wherein after the annealing, each of the first and second CoFeB layers is poly-crystalline in which a (001) crystal plane is preferentially oriented and each of the first and second CoFeB layers includes a BCC (body-centered cubic) structure. 6 . The method of claim 3 , wherein after the annealing, the first and second CoFeB layers are entirely crystallized, and each of the first and second CoFeB layers is poly-crystalline in which a (001) crystal plane is preferentially oriented and each of the first and second CoFeB layers includes a BCC (body-centered cubic) structure. 7 . The method of claim 3 , wherein in the forming the MgO layer, the MgO layer is formed as a MgOx (0<x<1) layer. 8 . The method of claim 3 , wherein in the forming the MgO layer, the MgO layer is formed directly on the first CoFeB layer. 9 . The method of claim 3 , wherein: in the forming the MgO layer, the MgO layer is formed directly on the first CoFeB layer, and in the forming the second CoFeB layer, the second CoFeB layer is formed directly on the MgO layer. 10 . The method of claim 3 , wherein after the annealing, the MTJ devices are (001) oriented poly-crystal MTJ devices. 11 . A method of manufacturing a magnetoresistive random access memory (MRAM) comprising memory cells, each of the memory cells comprising a transistor and a magnetic tunnel junction (MTJ) device, the method comprising: forming a first ferromagnetic layer of the MTJ devices, the first ferromagnetic layer including a first CoFeB layer that is amorphous; forming a barrier layer of the MTJ devices, the barrier layer including a magnesium oxide (MgO) layer to have a poly-crystalline state in which a (001) crystal plane is preferentially oriented over the first ferromagnetic layer, forming a second ferromagnetic layer of the MTJ devices, the second ferromagnetic layer including a second CoFeB layer that is amorphous over the barrier layer; and annealing the MTJ devices to crystallize the first and second CoFeB layers. 12 . The method of claim 11 , wherein after the annealing, the first and second CoFeB layers are entirely crystallized. 13 . The method of claim 11 , wherein after the annealing, the first and second CoFeB layers are entirely crystallized, and each of the first and second CoFeB layers is poly-crystalline in which a (001) crystal plane is preferentially oriented and each of the first and second CoFeB layers includes a BCC (body-centered cubic) structure. 14 . The method of claim 11 , wherein in the forming the barrier layer, the value of x in MgOx for the MgO layer is greater than 0 and less than 1. 15 . The method of claim 11 , wherein: in the forming the barrier layer, the barrier layer is formed directly on the first ferromagnetic layer, and in the forming the second ferromagnetic layer, the second ferromagnetic layer is formed directly on the barrier layer. 16 . The method of claim 11 , wherein after the annealing, the MTJ devices are (001) oriented poly-crystal MTJ devices. 17 . A method of manufacturing a magnetoresistive random access memory (MRAM) comprising: forming transistors on a Si substrate; forming word lines; forming a first CoFeB layer of magnetic tunnel junction (MTJ) devices, the first CoFeB layer being amorphous; forming a magnesium oxide (MgO) layer of the MTJ devices over the first CoFeB layer; forming a second CoFeB layer of the MTJ devices, the second CoFeB layer being amorphous over the MgO layer; forming bit lines which intersect with the word lines at intersections, regions of the intersections including one of the transistors and one of the MTJ devices; and annealing the MTJ devices to form (001) oriented poly-crystal MTJ devices. 18 . The method of claim 17 , wherein after the annealing, the first and second CoFeB layers are entirely crystallized. 19 . The method of claim 17 , wherein after the annealing, the first and second CoFeB layers are entirely crystallized, and each of the first and second CoFeB layers is poly-crystalline in which a (001) crystal plane is preferentially oriented and each of the first and second CoFeB layers includes a BCC (body-centered cubic) structure. 20 . The method of claim 17 , wherein in the forming the MgO layer, the MgO layer is formed as a MgO x (0<x<1) layer. 21 . The method of claim 17 , wherein in the forming the MgO layer, the MgO layer is poly-crystalline in which a (001) crystal plane is preferentially oriented. 22 . The method of claim 17 , wherein the MgO layer is poly-crystalline in which a (001) crystal plane is preferentially oriented.

Assignees

Inventors

Classifications

  • having dielectrics comprising perovskite structures · CPC title

  • H10N50/85Primary

    Materials of the active region · CPC title

  • the spacer being semiconducting or insulating, e.g. for spin tunnel junction [STJ] · CPC title

  • using elements in which the storage effect is based on magnetic spin effect · CPC title

  • Manufacture or treatment · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2020259077A1 cover?
The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier la…
Who is the assignee on this patent?
Japan Science & Tech Agency, Aist
What technology area does this patent fall under?
Primary CPC classification H10N50/85. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Aug 13 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).