Method for managing a cache memory of an electronic processor

Patent metadata

Field	Value
Publication number	US-2020257637-A1
Application number	US-202016744268-A
Country	US
Kind code	A1
Filing date	Jan 16, 2020
Priority date	Feb 11, 2019
Publication date	Aug 13, 2020
Grant date	—

Abstract

A method for managing a cache memory, including executing first and second processes, when the second process modifies the state of the cache memory, updating the value of an indicator associated with this second process, and comparing the value of this indicator to a predefined threshold and, when this predefined threshold is exceeded, detecting an abnormal use of the cache memory by the second process, in response to this detection, modifying pre-recorded relationships in order to associate with the identifier of the second process a value of a parameter q different from the value of the parameter q associated with the first process so that, after this modification, when the received address of a word to be read is the same for the first and second processes, then the set addresses used to read this word from the cache memory are different.

First claim

1 . A method for managing a cache memory of an electronic processor, said method comprising executing the following steps each time first and second processes, executed by the electronic processor, desire to read a word shared in read-only mode from the cache memory:
a) receiving a request containing an address of the word to be read, this said address comprising
a line tag,
a set address, said set address belonging to a first set of s different values, where the number s is an integer number higher than two,
b) selecting, depending on an identifier of the process, a value of a parameter q, each value of the parameter q identifying a respective bijective conversion function that permutes at least 50% of the values of the first set, said selection being carried out using pre-recorded relationships that associate one value of the parameter q with each identifier of a process, then c) converting the received set address into a converted set address using the conversion function identified by the selected value of the parameter q, then d) selecting one or more line tags stored in the cache memory at the converted set address, then e) comparing the received line tag to the one or more selected line tags selected from the converted set address, in order to determine whether one of these selected line tags corresponds to the received line tag, f) when none of the selected tags corresponds to the received line tag, triggering a cache miss and delivering the word from a memory of higher rank, and when, in contrast, one of the selected line tags corresponds to the received line tag, reading from the cache memory the word from the line associated with the line tag that corresponds to the received line tag, at least during the first execution of steps a) to f), for the first and second processes, the pre-recorded relationships associate the identifiers of the first and second processes with the same value of the parameter q so that when the received address of the word to be read is the same for the first and second processes, then the converted set addresses used to read said word are the same, wherein the method in addition comprises:
when the second process modifies the state of the cache memory, updating the value of at least one indicator specifically associated with said second process, the value of said indicator being representative of a particular modification of the state of the cache memory triggered by the second process, and
comparing the value of said indicator to a predefined threshold and, when said predefined threshold is exceeded, detecting an abnormal use of the cache memory by the second process and, when the value of the indicator does not cross the predefined threshold, not detecting an abnormal use,
in response to the detection of an abnormal use of the cache memory by the second process, modifying the pre-recorded relationships in order to associate, with the identifier of the second process, a value of the parameter q different from the value of the parameter q associated with the first process so that, after said modification, when the received address of the word to be read is the same for the first and second processes, then the converted set addresses used to read said word are different, and
in the absence of detection of abnormal use, the pre-recorded relationships are left unchanged.

2 . The method according to claim 1 , wherein:
the predefined relationships associate, with each identifier of a process, a plurality of virtual memory page numbers, and each number of a virtual memory page is associated with its own value of the parameter q, said value of the parameter q associated with said page number being different from the values of the parameter q associated with the same process identifier and with the other page numbers, and in step b), the value of the parameter q is selected depending on the identifier of the process and on the number of the page of the virtual memory containing the word to be read.

3 . The method according to claim 2 , wherein:
the predefined relationships associate, with each number of a virtual memory page, a physical address of said page, and the method comprises obtaining the received address of the word to be read in step a) and replacing the number of the page of the virtual memory containing the word to be read with the physical address associated, via the pre-recorded relationships, with said page number and with the identifier of the process that desires to read said word.

4 . The method according to claim 1 , wherein the update of at least one indicator specifically associated with the second process comprises:
each time that the second process causes a new line to be loaded into a predefined group of one or more line sets shared in read-only mode, associating said new line with the identifier of the second process, then updating the value of a first indicator depending on the number of lines of said predefined group that are associated with the identifier of said second process.

5 . The method according to claim 1 , wherein the update of at least one indicator specifically associated with the second process comprises, each time the second process accesses a line of a predefined group of one or more line sets shared in read-only mode, updating the value of a second indicator depending on the number of times the second process has accessed said predefined group in a predefined time interval.

6 . The method according to claim 1 , wherein the update of at least one indicator specifically associated with the second process comprises, each time the execution of the second process triggers the execution by the electronic processor of an explicit instruction to evict from the cache memory a line located at an address specified by the second process, updating the value of a third indicator depending on the number of times the execution of the second process triggers the execution of said explicit eviction instruction.

7 . The method according to claim 1 , wherein, after an abnormal use has been detected, for at least 50% of the values of the first set, the conversion function identified by the value of the parameter q associated with the second process returns a converted set address different from the converted set address that is returned by the conversion function identified by the value of the parameter q associated with the first process.

8 . The method according to claim 1 , wherein, independently of the detection of an abnormal use of the cache memory by the second process, the method comprises, during the execution of the first and second process, repeatedly modifying the pre-recorded relationships by replacing, in the predefined relationships, each occurrence of a given value of the parameter q with another value of the parameter q, so that, during a given execution of the first and second process, the conversion function, implemented in step c), successively associates over time, with a given set address liable to be received, a plurality of different converted set addresses.

9 . The method according to claim 1 , wherein:
a modification counter is incremented each time the value of the parameter q is modified, each time a new line is stored in the cache memory, the current value of the modification counter is stored in a line counter associated solely with said line, when one of the selected line tags corresponds to the received line tag, the method comprises:
comparing the value of the line counter of the line comprising said line tag to the value of the modification counter,
when the value of the line counter is lower than C m -M, then read-out of the word from the cache memory is inhibited and a cache miss is triggered, and
in contrast, when the value of

Assignees

• Commissariat Energie Atomique
• Commissariat A I'Energie Atomique Et Aux Energies Alternatives

Inventors

• Hiscock Thomas
• El Majihi Mustapha
• Savry Olivier

Classifications

• G06F2212/225

  Hybrid cache memory, e.g. having both volatile and non-volatile portions · CPC title

• G06F2212/6012

  of operating mode, e.g. cache mode or local memory mode · CPC title

• G06F12/0897

  with two or more cache hierarchy levels (with multilevel cache hierarchies G06F12/0811) · CPC title

• G06F12/128 Primary

  adapted to multidimensional cache systems, e.g. set-associative, multicache, multiset or multilevel · CPC title

• G06F2212/657

  Virtual address space management · CPC title