Image capturing apparatus

Patent metadata

Field	Value
Publication number	US-2020252563-A1
Application number	US-202016778475-A
Country	US
Kind code	A1
Filing date	Jan 31, 2020
Priority date	Feb 4, 2019
Publication date	Aug 6, 2020
Grant date	—

Abstract

An image capturing apparatus includes an image sensor in which a plurality of unit pixels are arranged, each unit pixel including one microlens and at least one light receiving portion that produces a pulse signal when light is incident on the light receiving portion, wherein the unit pixel includes a counting circuit capable of counting the pulse signals of a plurality of the light receiving portions.

First claim

What is claimed is:

1 . An image capturing apparatus comprising an image sensor in which a plurality of unit pixels are arranged, each unit pixel including one microlens and at least one light receiving portion that produces a pulse signal when light is incident on the light receiving portion,
wherein the unit pixel includes a counting circuit capable of counting the pulse signals of a plurality of the light receiving portions.

2 . The image capturing apparatus according to claim 1 ,
wherein the counting circuit includes a first counter that counts the pulse signals from all of the plurality of light receiving portions arranged in the unit pixel.

3 . The image capturing apparatus according to claim 2 ,
wherein the counting circuit further includes a second counter that counts the pulse signals from some of the plurality of light receiving portions arranged in the unit pixel.

4 . The image capturing apparatus according to claim 3 , further comprising:
a subtracting circuit that subtracts a count value obtained by the counting by the second counter from a count value obtained by the counting by the first counter.

5 . The image capturing apparatus according to claim 4 , further comprising:
an image generating circuit that generates an image for recording and display from the count value obtained by the counting by the first counter.

6 . The image capturing apparatus according to claim 4 , further comprising:
a focus detection circuit that carries out focus detection using the count value obtained by the counting by the second counter and the count value obtained by the subtracting circuit.

7 . The image capturing apparatus according to claim 3 ,
wherein the unit pixel includes two light receiving portions; the first counter counts the pulse signals from the two light receiving portions; and the second counter counts the pulse signal from one of the two light receiving portions.

8 . The image capturing apparatus according to claim 3 ,
wherein the unit pixel includes four light receiving portions; the first counter counts the pulse signals from the four light receiving portions; and the second counter counts the pulse signal from two of the four light receiving portions.

9 . The image capturing apparatus according to claim 3 ,
wherein the second counter is provided only in a unit pixel located in a region where focus detection is carried out.

10 . The image capturing apparatus according to claim 1 ,
wherein the counting circuit includes a third counter corresponding to each of the plurality of light receiving portions, and an adding circuit that adds count values from the third counters.

11 . The image capturing apparatus according to claim 10 ,
wherein the counting circuit further includes a selecting circuit that selects which one of count values from the third counters corresponding to the plurality of light receiving portions is to be input to the adding circuit.

12 . The image capturing apparatus according to claim 11 ,
wherein the selecting circuit selects which one of count values from the third counters corresponding to the plurality of light receiving portions is to be input to the adding circuit, in accordance with an image capturing mode.

13 . The image capturing apparatus according to claim 12 ,
wherein the image capturing mode is a mode for driving the image sensor, a mode for reading out a focus detection image from the image sensor, or a mode for reading out a captured image from the image sensor.

14 . The image capturing apparatus according to claim 11 ,
wherein the selecting circuit inputs the count values of the third counters corresponding to light receiving portions in adjacent unit pixels of the same color to the adding circuit.

15 . The image capturing apparatus according to claim 11 ,
wherein the selecting circuit inputs a value of zero to the adding circuit.

16 . The image capturing apparatus according to claim 1 ,
wherein the counting circuit includes a first counter circuit that counts the pulse signals from a plurality of the light receiving portions, and a second counter circuit that counts the pulse signals from some of the plurality of light receiving portions.

17 . The image capturing apparatus according to claim 16 ,
wherein the first counter circuit includes a first comparator and a first counter, and the second counter circuit includes a second comparator and a second counter.

18 . The image capturing apparatus according to claim 17 ,
wherein the apparatus has a first mode, in which signals are output from both the first counter and the second counter, and a second mode, in which signals are output from only the first counter.

19 . The image capturing apparatus according to claim 17 ,
wherein a bit length of the first counter is longer than a bit length of the second counter.

20 . The image capturing apparatus according to claim 17 , further comprising:
a signal processing circuit that adds the output signal from the first counter and the output signal from the second counter.

21 . The image capturing apparatus according to claim 18 ,
wherein in the second mode, at least one of the light receiving portion corresponding to the second counter circuit, the second comparator, and the second counter is stopped.

22 . The image capturing apparatus according to claim 17 ,
wherein the apparatus further has a third mode in which the first counter and the second counter are connected, and a signal having the total bit number of the first and second counters is output.

23 . The image capturing apparatus according to claim 18 ,
wherein the first mode is a non-pixel mixing mode, and the second mode is a pixel mixing mode.

24 . The image capturing apparatus according to claim 17 , further comprising:
a signal processing circuit that subtracts the output signal from the second counter, from the output signal from the first counter.

25 . The image capturing apparatus according to claim 16 , further comprising:
a timing control circuit that controls a time at which the signal from the light receiving portion corresponding to the first counter is counted by the first counter circuit, and a time at which the signal from the light receiving portion corresponding to the second counter is counted by the first and second counter circuits, to be different timings.

26 . The image capturing apparatus according to claim 17 ,
wherein the light receiving portion, and the first and second comparators, are disposed on mutually-different first and second substrates.

27 . The image capturing apparatus according to claim 1 ,
wherein the light receiving portion is an avalanche photodiode.

Assignees

• Canon Kk

Inventors

• Yasuda Takayuki
• Katagawa Hiroyasu
• Iwahara Tomonaga

Classifications

• H04N25/778

  comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself · CPC title

• H04N25/704 Primary

  Pixels specially adapted for focusing, e.g. phase difference pixel sets · CPC title

• H04N25/42

  by switching between different modes of operation using different resolutions or aspect ratios, e.g. switching between interlaced and non-interlaced mode · CPC title

• H04N25/773

  comprising photon counting circuits, e.g. single photon detection [SPD] or single photon avalanche diodes [SPAD] · CPC title

• H04N5/37457

  Electricity · mapped topic