Semiconductor device

US2020243641A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2020243641-A1
Application numberUS-201816613549-A
CountryUS
Kind codeA1
Filing dateMay 17, 2018
Priority dateMay 17, 2017
Publication dateJul 30, 2020
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device includes a semiconductor layer of a first conductivity type having a first main surface at one side and a second main surface at another side, a trench gate structure including a gate trench formed in the first main surface of the semiconductor layer, and a gate electrode embedded in the gate trench via a gate insulating layer, a trench source structure including a source trench formed deeper than the gate trench and across an interval from the gate trench in the first main surface of the semiconductor layer, a source electrode embedded in the source trench, and a deep well region of a second conductivity type formed in a region of the semiconductor layer along the source trench, a ratio of a depth of the trench source structure with respect to a depth of the trench gate structure being not less than 1.5 and not more than 4.0, a body region of the second conductivity type formed in a region of a surface layer portion of the first main surface of the semiconductor layer between the gate trench and the source trench, a source region of the first conductivity type formed in a surface layer portion of the body region, and a drain electrode connected to the second main surface of the semiconductor layer.

First claim

Opening claim text (preview).

1 . A semiconductor device comprising: a semiconductor layer of a first conductivity type having a first main surface at one side and a second main surface at another side; a trench gate structure including a gate trench formed in the first main surface of the semiconductor layer, and a gate electrode embedded in the gate trench via a gate insulating layer; a trench source structure including a source trench formed deeper than the gate trench and formed across an interval from the gate trench in the first main surface of the semiconductor layer, a source electrode embedded in the source trench, and a well region of a second conductivity type formed in a region of the semiconductor layer along the source trench, a ratio of a depth of the trench source structure with respect to a depth of the trench gate structure being not less than 1.5 and not more than 4.0; a body region of the second conductivity type formed in a region of a surface layer portion of the first main surface of the semiconductor layer between the gate trench and the source trench; a source region of the first conductivity type formed in a surface layer portion of the body region; and a drain electrode connected to the second main surface of the semiconductor layer. 2 . The semiconductor device according to claim 1 , wherein an aspect ratio of the trench source structure is greater than an aspect ratio of the trench gate structure. 3 . The semiconductor device according to claim 1 , wherein an aspect ratio of the trench source structure is not less than 0.5 and not more than 18.0. 4 . The semiconductor device according to of claim 1 , wherein a depletion layer spreads from a boundary region between the semiconductor layer and the well region toward a region of the second main surface side than a bottom wall of the gate trench in the semiconductor layer. 5 . The semiconductor device according to claim 4 , wherein the depletion layer overlaps to the bottom wall of the gate trench. 6 . The semiconductor device according to claim 1 , wherein the well region is formed in a region of the semiconductor layer along a side wall of the source trench. 7 . The semiconductor device according to claim 1 , wherein the well region is formed in a region of the semiconductor layer along a bottom wall of the source trench. 8 . The semiconductor device according to claim 1 , wherein the well region is formed continuously in a region of the semiconductor layer along a side wall, a bottom wall, and a corner portion connecting the side wall and the bottom wall of the source trench. 9 . The semiconductor device according to claim 1 , wherein the well region is connected to the body region. 10 . The semiconductor device according to claim 1 , wherein the trench source structure includes a barrier forming layer interposed in a region between the source trench and the source electrode and having a higher potential barrier than a potential barrier between the well region and the source electrode. 11 . The semiconductor device according to claim 10 , wherein the barrier forming layer includes an insulating barrier forming layer made of an insulating material. 12 . The semiconductor device according to claim 10 , wherein the barrier forming layer includes a conductive barrier forming layer made of a conductive material differing from a conductive material of the source electrode. 13 . The semiconductor device according to claim 10 , wherein the barrier forming layer includes an insulating barrier forming layer made of an insulating material, and a conductive barrier forming layer made of a conductive material differing from a conductive material of the source electrode. 14 . The semiconductor device according to claim 10 , wherein the barrier forming layer is formed along a side wall, a bottom wall, and a corner portion connecting the side wall and the bottom wall of the source trench. 15 . The semiconductor device according to claim 1 , further comprising: a contact region of the second conductivity type formed in a region of the semiconductor layer along a side wall of the source trench and having a second conductivity type impurity concentration higher than a second conductivity type impurity concentration of the body region. 16 . The semiconductor device according to claim 1 , further comprising: a contact region of the second conductivity type formed in a region of the semiconductor layer along a bottom wall of the source trench and having a second conductivity type impurity concentration higher than a second conductivity type impurity concentration of the body region. 17 . A semiconductor device comprising: a semiconductor layer of a first conductivity type having a first main surface at one side and a second main surface at another side; a trench gate structure including a gate trench having a first side wall and a first bottom wall and formed in the first main surface of the semiconductor layer, and a gate electrode embedded in the gate trench via a gate insulating layer; a trench source structure including a source trench having a second side wall and a second bottom wall and formed across an interval from the gate trench in the first main surface of the semiconductor layer, a source electrode embedded in the source trench, and a well region of a second conductivity type formed in a region of the semiconductor layer along the source trench; a body region of the second conductivity type formed in a region of a surface layer portion of the first main surface of the semiconductor layer between the gate trench and the source trench; a source region of the first conductivity type formed in a surface layer portion of the body region; and a drain electrode connected to the second main surface of the semiconductor layer; wherein the second side wall of the source trench includes a first wall portion positioned at the first main surface side of the semiconductor layer with respect to the first bottom wall of the gate trench, and a second wall portion positioned at the second main surface side of the semiconductor layer with respect to the first bottom wall of the gate trench, and the well region includes a first region formed along the first wall portion of the second side wall of the source trench, and a second region formed along the second wall portion of the second side wall of the source trench and having a length greater than a length of the first region in regard to a thickness direction of the semiconductor layer.

Assignees

Inventors

Classifications

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  • Emitter regions of IGBTs · CPC title

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What does patent US2020243641A1 cover?
A semiconductor device includes a semiconductor layer of a first conductivity type having a first main surface at one side and a second main surface at another side, a trench gate structure including a gate trench formed in the first main surface of the semiconductor layer, and a gate electrode embedded in the gate trench via a gate insulating layer, a trench source structure including a source…
Who is the assignee on this patent?
Rohm Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D62/106. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jul 30 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).