Power factor improvement circuit and semiconductor apparatus

Patent metadata

Field	Value
Publication number	US-2020204065-A1
Application number	US-202016807099-A
Country	US
Kind code	A1
Filing date	Mar 2, 2020
Priority date	Mar 30, 2018
Publication date	Jun 25, 2020
Grant date	—

Abstract

A power factor improvement circuit that performs, on the basis of an output voltage when a switching power-supply apparatus is in a light-load state or a no-load state, a burst operation for switching between states of the switching operation of a switching element includes: a first circuit that outputs a first voltage that corresponds to the error between a reference voltage and a voltage obtained by dividing the output voltage; and a clamp circuit that, while the burst operation is performed, clamps the lower limit of the first voltage, which decreases when the switching operation of the switching element is disabled, at a lower-limit voltage higher than the ground voltage of the power factor improvement circuit and clamps the upper limit of the first voltage, which increases when the switching operation of the switching element is performed, at an upper-limit voltage.

First claim

What is claimed is:

1 . A power factor improvement circuit that performs, on the basis of an output voltage when a switching power-supply apparatus is in a light-load state or a no-load state, a burst operation for switching between a stopped state in which a switching operation of a switching element is disabled and an operating state in which the switching operation of the switching element is enabled, the power factor improvement circuit comprising:
a first circuit that outputs a first voltage that corresponds to an error between a reference voltage and a voltage obtained by dividing the output voltage; a second circuit that outputs a second voltage that starts to rise from a predetermined initial value in synchrony with the switching element being turned on; a third circuit that turns off the switching element when the second voltage has reached the first voltage; and a clamp circuit that, while the burst operation is performed, clamps a lower limit of the first voltage, which decreases when the switching operation of the switching element in the stopped state is disabled, at a lower-limit voltage higher than a ground voltage of the power factor improvement circuit and clamps an upper limit of the first voltage, which increases when the switching operation of the switching element in the operating state is performed, at an upper-limit voltage.

2 . The power factor improvement circuit according to claim 1 , wherein
the clamp circuit includes
a first amplifier that clamps the first voltage at the upper-limit voltage during the operating state in the burst operation, and
a second amplifier that clamps the first voltage at the lower-limit voltage during the stopped state in the burst operation.

3 . The power factor improvement circuit according to claim 2 , wherein
the clamp circuit further includes a voltage source that supplies the upper-limit voltage to be input to the first amplifier, and the voltage source is a variable voltage source capable of varying the upper-limit voltage in accordance with an input voltage of the switching power-supply apparatus.

4 . The power factor improvement circuit according to claim 1 , wherein
the clamp circuit includes
an amplifier that clamps the first voltage at the upper-limit voltage during the operating state in the burst operation, and
a circuit that decreases the first voltage on the basis of a result of comparison between the first voltage and the lower-limit voltage during the stopped state in the burst operation.

5 . The power factor improvement circuit according to claim 4 , wherein
the circuit that decreases the first voltage includes a hysteresis comparator that compares the first voltage with the lower-limit voltage, the lower-limit voltage comprising a first lower-limit voltage and a second lower-limit voltage, and the clamp circuit varies the first voltage between the first lower-limit voltage and the second lower-limit voltage during the stopped state in the burst operation.

6 . The power factor improvement circuit according to claim 4 , wherein
the clamp circuit further includes a voltage source that supplies the upper-limit voltage to be input to the first amplifier, and the voltage source is a variable voltage source capable of varying the upper-limit voltage in accordance with an input voltage of the switching power-supply apparatus.

7 . The power factor improvement circuit according to claim 6 , wherein
the clamp circuit further includes a first decrease circuit that decreases the first voltage when a division of the input voltage is equal to or less than a threshold and a second decrease circuit that decreases the first voltage when the voltage obtained by dividing the output voltage is greater than the threshold.

8 . A semiconductor apparatus that controls, on the basis of an output voltage when a switching power-supply apparatus is in a light-load state or a no-load state, a burst operation for switching between a stopped state in which a switching operation of a switching element is disabled and an operating state in which the switching operation of the switching element is enabled, the semiconductor apparatus comprising:
a first circuit that outputs a first voltage that corresponds to an error between a reference voltage and a voltage obtained by dividing the output voltage; a second circuit that outputs a second voltage that starts to rise from a predetermined initial value in synchrony with the switching element being turned on; a third circuit that outputs a signal for turning off the switching element when the second voltage has reached the first voltage; and a clamp circuit that, while the burst operation is performed, clamps a lower limit of the first voltage, which decreases when the switching operation of the switching element in the stopped state is disabled, at a lower-limit voltage higher than a ground voltage of a power factor improvement circuit including the semiconductor apparatus and clamps an upper limit of the first voltage, which increases when the switching operation of the switching element in the operating state is performed, at an upper-limit voltage.

Assignees

• Fuji Electric Co Ltd

Inventors

• Masuda Nobuyuki
• Sugawara Takato

Classifications

• H02M1/4225 Primary

  using a non-isolated boost converter · CPC title

• H02M1/0054

  Transistor switching losses (periodically suspending operation of switching converter in low power mode H02M1/0035) · CPC title

• H02M1/0035

  using burst mode control · CPC title

• H02M1/0025

  Arrangements for modifying reference values, feedback values or error values in the control loop of a converter · CPC title

• Y02B70/10

  Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title