Method of manufacturing a display device

Patent metadata

Field	Value
Publication number	US-2020203223-A1
Application number	US-201916713076-A
Country	US
Kind code	A1
Filing date	Dec 13, 2019
Priority date	Dec 20, 2018
Publication date	Jun 25, 2020
Grant date	—

Abstract

A method of manufacturing a display device comprises: forming a thin film transistor array on a substrate, wherein the substrate has a via which enable two opposite sides of the substrate to be communicated with each other; and filling the via with a conductive filler after the thin film transistor array is formed, so that the conductive filler is electrically connected with the thin film transistor array.

First claim

What is claimed is:

1 . A method of manufacturing a display device, comprising:
forming a thin film transistor array on a substrate, wherein the substrate has a first via which enable two opposite sides of the substrate to be communicated with each other; and filling the first via with a conductive filler after the thin film transistor array is formed, so that the conductive filler is electrically connected with the thin film transistor array.

2 . The method of manufacturing a display device according to claim 1 , wherein filling the first via with the conductive filler is performed at a preset temperature.

3 . The method of manufacturing a display device according to claim 1 , wherein a material of the conductive filler contains at least one of metal slurry and carbon nanotubes.

4 . The method of manufacturing a display device according to claim 1 , further comprising:
coupling a control circuit board to the first via.

5 . The method of manufacturing a display device according to claim 1 , wherein the substrate has a display area and an marginal area, the marginal area encircles the display area, and the first via is located in the marginal area.

6 . The method of manufacturing a display device according to claim 1 , wherein the thin film transistor array comprises a plurality of display units, and the first via is located between two adjacent display units in the display units.

7 . The method of manufacturing a display device according to claim 6 , further comprising:
forming a connection circuit on one surface of the substrate away from the thin film transistor array, the connection circuit being connected with the first via, wherein the surface of the substrate away from the thin film transistor array has a wiring area corresponding to an area between the display units, and the connection circuit is partially located in the wiring area.

8 . The method of manufacturing a display device according to claim 7 , further comprising:
coupling a control circuit board to the connection circuit.

9 . The method of manufacturing a display device according to claim 1 , further comprising:
forming a second via in a backlight module, the second via enabling two opposite sides of the backlight module to be communicated with each other; filling the second via with another conductive filler; and coupling the first via to one end of the second via facing the substrate.

10 . The method of manufacturing a display device according to claim 9 , further comprising:
coupling a control circuit board to the other end of the second via.

Assignees

• Asustek Comp Inc

Inventors

• Hung Wen-Chang
• Zhong Xian

Classifications

• H10W20/056 Primary

  by filling conductive material into holes, grooves or trenches · CPC title

• H10D86/441 Primary

  Interconnections, e.g. scanning lines · CPC title

• H10D86/0212

  comprising manufacture, treatment or coating of substrates · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10K59/127

  comprising two substrates, e.g. display comprising OLED array and TFT driving circuitry on different substrates · CPC title