Hybrid configuration management using bootloader translation

US2020192679A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2020192679-A1
Application numberUS-201816219273-A
CountryUS
Kind codeA1
Filing dateDec 13, 2018
Priority dateDec 13, 2018
Publication dateJun 18, 2020
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A hybrid co-processing system including both complex instruction set computer (CISC) architecture-based processing clusters and reduced instruction set computer (RISC) architecture-based processing clusters includes a parser to derive from a hardware configuration specific to the CISC architecture, such as an ACPI table, a device tree specific to the RISC architecture for booting. The hardware configuration information indicated by the device tree is specific to the RISC architecture, and in different cases includes more, less, or revised information than a corresponding ACPI table for the same hybrid co-processing system.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method, comprising: communicating, at a bootloader of a hybrid co-processing system comprising a first processing cluster of a first architecture type and a second processing cluster of a second architecture type, a first hardware configuration of the hybrid co-processing system specific to the first architecture type to a first operating system at the first processing cluster during boot up of the hybrid co-processing system; deriving, at the bootloader, a second hardware configuration of the hybrid co-processing system specific to the second architecture type based on the first hardware configuration; and communicating, during boot up of the hybrid co-processing system, the second hardware configuration to a second operating system at the second processing cluster. 2 . The method of claim 1 , wherein the first architecture type comprises a complex instruction set architecture. 3 . The method of claim 2 , wherein the first hardware configuration is based on an advanced configuration and power interface (ACPI) table. 4 . The method of claim 1 , wherein the second architecture type comprises a reduced instruction set architecture. 5 . The method of claim 3 , wherein deriving comprises parsing a device tree based on the ACPI table. 6 . The method of claim 1 , wherein deriving comprises at least one of: logically pruning, restricting, or adding information specific to the second architecture type. 7 . The method of claim 1 , wherein the first hardware configuration and the second hardware configuration comprise at least one of: memory configuration, input/output configuration, device capabilities, peripheral devices, and custom bootstrings. 8 . A method, comprising: booting a hybrid co-processing system comprising a first processing cluster of a first architecture type and a second processing cluster of a second architecture type, wherein booting comprises: converting, at a bootloader, a first hardware configuration of the hybrid co-processing system based on the first architecture type to a second hardware configuration of the hybrid co-processing system based on the second architecture type; and providing the first hardware configuration to a first operating system at the first processing cluster and providing the second hardware configuration to a second operating system at the second processing cluster. 9 . The method of claim 8 , wherein the first architecture type comprises a complex instruction set architecture. 10 . The method of claim 9 , wherein the first hardware configuration is based on an advanced configuration and power interface (ACPI) table. 11 . The method of claim 10 , wherein converting comprises parsing a device tree based on the ACPI table. 12 . The method of claim 8 , wherein the second architecture type comprises a reduced instruction set architecture. 13 . The method of claim 8 , wherein converting comprises at least one of: logically pruning, restricting, or adding information specific to the second architecture type. 14 . The method of claim 8 , wherein the first hardware configuration and the second hardware configuration comprise at least one of: memory configuration, input/output configuration, device capabilities, peripheral devices, and custom bootstrings. 15 . A device, comprising: a first processing cluster of a first architecture type; a second processing cluster of a second architecture type; and a bootloader configured to: communicate a first hardware configuration of the device specific to the first architecture type to a first operating system at the first processing cluster during boot up of the device; derive a second hardware configuration of the device specific to the second architecture type based on the first hardware configuration; and communicate, during boot up of the device, the second hardware configuration to a second operating system at the second processing cluster. 16 . The device of claim 15 , wherein the first architecture type comprises a complex instruction set architecture. 17 . The device of claim 16 , wherein the first hardware configuration is based on an advanced configuration and power interface (ACPI) table. 18 . The device of claim 17 , wherein the bootloader is configured to parse a device tree based on the ACPI table. 19 . The device of claim 15 , wherein the second architecture type comprises a reduced instruction set architecture. 20 . The device of claim 15 , wherein the bootloader is configured to perform at least one of: logically pruning, restricting, or adding information specific to the second architecture type to the first hardware configuration.

Assignees

Inventors

Classifications

  • Configuring for operating with peripheral devices; Loading of device drivers · CPC title

  • G06F9/4408Primary

    Boot device selection · CPC title

  • Configuring for program initiating, e.g. using registry, configuration files · CPC title

  • Grid computing · CPC title

  • considering software capabilities, i.e. software resources associated or available to the machine · CPC title

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What does patent US2020192679A1 cover?
A hybrid co-processing system including both complex instruction set computer (CISC) architecture-based processing clusters and reduced instruction set computer (RISC) architecture-based processing clusters includes a parser to derive from a hardware configuration specific to the CISC architecture, such as an ACPI table, a device tree specific to the RISC architecture for booting. The hardware …
Who is the assignee on this patent?
Ati Technologies Ulc
What technology area does this patent fall under?
Primary CPC classification G06F9/4408. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Jun 18 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).