Circuit board and manufacturing method thereof
US-2016249445-A1 · Aug 25, 2016 · US
US2020170102A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2020170102-A1 |
| Application number | US-201916663397-A |
| Country | US |
| Kind code | A1 |
| Filing date | Oct 25, 2019 |
| Priority date | Nov 26, 2018 |
| Publication date | May 28, 2020 |
| Grant date | — |
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A printed circuit board includes: a first insulating layer; and a heat radiating circuit pattern disposed on a first surface of the first insulating layer and having a pad and a via. The heat radiating circuit pattern includes: a first metal layer disposed on the first insulating layer; a graphite layer disposed on the first metal layer; and a second metal layer disposed on the graphite layer.
Opening claim text (preview).
What is claimed is: 1 . A printed circuit board comprising: a first insulating layer; and a heat radiating circuit pattern disposed on a first surface of the first insulating layer and comprising a pad and a via, wherein the heat radiating circuit pattern comprises: a first metal layer disposed on the first insulating layer; a graphite layer disposed on the first metal layer; and a second metal layer disposed on the graphite layer. 2 . The printed circuit board of claim 1 , further comprising a first circuit pattern formed on a second surface of the first insulating layer opposite the first surface, wherein the graphite layer forms a heat transfer path along a via land, a via hole and the first circuit pattern in the via. 3 . The printed circuit board of claim 2 , wherein the first metal layer connects the via land, the via hole and the first circuit pattern together in the via; and the first metal layer, the graphite layer, and the second metal layer fill the via hole. 4 . The printed circuit board of claim 1 , further comprising an electronic element mounted on the first insulating layer and connected to the pad. 5 . The printed circuit board of claim 1 , further comprising: a solder resist layer disposed on the first surface of the first insulating layer and exposing the pad; a second insulating layer disposed on a second surface of the first insulating layer opposite the first surface; and a second circuit pattern disposed on the second insulating layer. 6 . A manufacturing method for a printed circuit board comprising: forming a via hole in a first insulating layer; forming a heat radiating layer by sequentially stacking a first metal layer, a graphite layer and a second metal layer on the via hole and the first insulating layer; and forming a heat radiating circuit pattern by selectively removing the heat radiating layer. 7 . The manufacturing method for a printed circuit board of claim 6 , wherein forming of the heat radiating layer comprises forming the graphite layer by sputtering carbon particles on an entire surface of the first metal layer; and forming of the heat radiating circuit pattern comprises selectively removing the first metal layer, the graphite layer and the second metal layer. 8 . The manufacturing method for a printed circuit board of claim 6 , wherein forming of the heat radiating layer comprises forming the graphite layer corresponding to the heat radiating circuit pattern by selectively sputtering carbon particles on the first metal layer; and forming of the heat radiating circuit pattern comprises selectively removing the first metal layer and the second metal layer. 9 . The manufacturing method for a printed circuit board of claim 6 , wherein forming of the heat radiating layer comprises forming the first metal layer on the via hole and the first insulating layer by electroless plating; and forming the second metal layer on the first insulating layer or the graphite layer by electroplating.
Electroless plating, e.g. finish plating or initial plating · CPC title
initial plating of through-holes in substrates having a metal pattern · CPC title
Use of materials for the {conductive, e.g. } metallic pattern · CPC title
Via provided in pad; Pad over filled via · CPC title
Carbon · CPC title
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