Reconfigurable switched capacitor power converter techniques

Patent metadata

Field	Value
Publication number	US-2020161964-A1
Application number	US-201916451616-A
Country	US
Kind code	A1
Filing date	Jun 25, 2019
Priority date	Mar 15, 2013
Publication date	May 21, 2020
Grant date	—

Abstract

An apparatus for converting a first voltage into a second voltage includes a reconfigurable switched capacitor power converter having a selectable conversion gain. The power converter has switch elements configured to electrically interconnect capacitors to one another and/or to the first or second voltage in successive states. The switch elements are configured to interconnect at least some capacitors to one another through the switch elements. A controller causes the reconfigurable switched capacitor power converter to transition between first and second operation modes. The controller minimizes electrical transients arising from transition between modes. In the first operating mode, the power converter operates with a first conversion gain. In the second operating mode, it operates with a second conversion gain.

First claim

1 . (canceled)

2 . An apparatus for converting a first voltage into a second voltage, said apparatus comprising a power converter that is to provide said second voltage at an output node as a result of having processed said first voltage, said power converter comprising a first sub-block, a second sub-block, and a switched-capacitor circuit that comprises a plurality of switch elements that are to electrically interconnect capacitors to one another such that at least some of said capacitors are interconnected to each other through one or more of said switch elements, wherein the first and second sub-blocks are to connect to the switched-capacitor circuit, wherein said first and second sub-blocks are to participate in controlling one of said first and second voltages and wherein said first and second sub-blocks are to be selectively connected to first and second dc nodes of said switched-capacitor circuit.

3 . The apparatus of claim 2 , further comprising switches that are to selectively connect said first and second sub-blocks to said corresponding first and second dc nodes.

4 . The apparatus of claim 2 , wherein each of said first and second sub-blocks comprises a linear regulator.

5 . The apparatus of claim 4 , wherein said linear regulator comprises a switch that, when closed, is to sink current from a corresponding one of said dc nodes.

6 . The apparatus of claim 2 , wherein said first and second sub-blocks are to be selectively connected to at least sink current from first and second dc nodes.

7 . The apparatus of claim 2 , wherein each of said dc nodes is to be connected to positive terminals of two capacitors in all states of said plurality of switch elements.

8 . The apparatus of claim 2 , wherein said capacitors and said plurality of switch elements, when connected, define a multi-phase cascade multiplier.

9 . The apparatus of claim 2 , wherein said capacitors and said plurality of switch elements, when connected, define first and second cascade multipliers connected in parallel, wherein a positive terminal of a first capacitor from said first cascade multiplier is to be connected to a positive terminal of a first capacitor from said second cascade multiplier at said first dc node, and wherein a positive terminal of a second capacitor from said first cascade multiplier is to be connected to a positive terminal of a second capacitor from said second cascade multiplier at said second dc node.

10 . The apparatus of claim 2 , wherein said plurality of switch elements comprise stack switches and phase switches, wherein said phase switches are to connect said capacitors to phase nodes of said switched-capacitor circuit and wherein said stack switches are to connect said capacitors to dc nodes of said switched-capacitor circuit, wherein said dc nodes include said first and second dc nodes.

11 . The apparatus of claim 10 , wherein said switch elements comprise transistors, wherein the number of transistors is less than the aggregate number of phase switches and stack switches.

12 . The apparatus of claim 10 , wherein said switch elements comprise transistors, wherein at least one of said transistors implements both a phase switch and a stack switch.

13 . The apparatus of claim 10 , wherein some of said phase nodes are to connect to no more than one capacitor and others of said phase nodes are to connect to plural capacitors.

14 . The apparatus of claim 10 , wherein some of said capacitors have their own phase nodes and others of said capacitors share phase nodes.

15 . The apparatus of claim 2 , further comprising circuitry toto bypass selected capacitors from said plurality of capacitors.

16 . The apparatus of claim 15 , wherein said circuitry for bypassing selected capacitors is coupled to at least one of said dc nodes.

17 . The apparatus of claim 2 , wherein, in a first mode of operation, said power converter operates with a first conversion gain and in a second mode of operation, said power converter operates with a second conversion gain.

18 . The apparatus of claim 2 , further comprising a controller, wherein said controller comprises said first and second sub-blocks.

19 . An apparatus for converting a first value of voltage into a second value of voltage, said apparatus comprising a reconfigurable switched capacitor power converter having a selectable value of conversion gain, said reconfigurable switched capacitor power converter comprising a plurality of switch elements to electrically interconnect capacitors to one another and/or to the first or second voltage in successive states, wherein said switch elements are to interconnect at least some capacitors to one another through said switch elements, a controller for causing said reconfigurable switched capacitor power converter to transition between a first mode of operation, during which said power converter operates with a first voltage gain, and a second mode of operation, during which said power converter operates with a second voltage gain, said controller being to reduce electrical transients during a transition period following a transition from said first mode to said second mode, wherein said controller is to execute an action during said transition period, wherein said action is selected from the group consisting of switching in a pre-charged bypass capacitor, suppressing input current using a bidirectional current limiter, and suppressing input current using a modulated on-resistance.

20 . The apparatus of claim 19 , wherein said controller is to switch in said pre-charged bypass capacitor.

21 . The apparatus of claim 19 , wherein said controller is is to suppress input current using one of said bidirectional current limiter and said modulated on-resistance.

Assignees

• Psemi Corp

Inventors

• Low Aichen
• Giullano David
• Szczeszynski Gregory
• Summit Jeff
• Blyde Oscar

Classifications

• H02M3/07 Primary

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

• H02M3/073

  Charge pumps of the Schenkel-type · CPC title

• H02M2003/075

  Electricity · mapped topic

• H02M2001/0003

  Electricity · mapped topic

• H02M1/0095

  Hybrid converter topologies, e.g. NPC mixed with flying capacitor, thyristor converter mixed with MMC or charge pump mixed with buck · CPC title