Display panel and electronic device including the same

Patent metadata

Field	Value
Publication number	US-2020144341-A1
Application number	US-201916516437-A
Country	US
Kind code	A1
Filing date	Jul 19, 2019
Priority date	Nov 2, 2018
Publication date	May 7, 2020
Grant date	—

Abstract

A display panel includes a peripheral region adjacent to a display region. The display region includes a hole peripheral region, and a recessed region is overlapped with the hole peripheral region. The display panel also includes a barrier layer with a penetrating opening overlapped with the recessed region, a circuit layer on the barrier layer and including transistor and insulating layers, and a device layer including an organic light emitting area coupled to the circuit layer. In addition, a module hole is overlapped with the hole peripheral region and penetrates the base substrate, and a first groove is overlapped with the hole peripheral region and corresponds to a portion of the base substrate that is recessed from a top surface of the barrier layer and that encloses the module hole. The insulating layers include inorganic layers and an organic layer having side portions enclosing the module hole.

First claim

What is claimed is:

1 . A display panel, comprising:
a base substrate including a display region and a peripheral region adjacent to the display region, the display region including a hole peripheral region and the base substrate further including a recessed region, the recessed region overlapped with the hole peripheral region and formed by recessing at least a portion of the base substrate; a barrier layer covering the base substrate and including an opening, the opening overlapped with the recessed region and penetrating the barrier layer; a circuit layer on the harrier layer and including a transistor and a plurality of insulating layers; a device layer including an organic light emitting area coupled to the circuit layer; a module hole overlapped with the hole peripheral region and penetrating the base substrate; and a first groove overlapped with the hole peripheral region and corresponding to a portion of the base substrate recessed from a top surface of the barrier layer and enclosing the module hole, wherein the insulating layers include a first inorganic layer, a second inorganic layer on the first inorganic layer, and an organic layer on the second inorganic layer, and wherein a side portion of each of the first inorganic layer and the second inorganic layer adjacent to the module hole encloses the module hole and is covered by the organic layer.

2 . The display panel of claim 1 , wherein the side portion of each of the first inorganic layer and the second inorganic layer is spaced apart from the first groove.

3 . The display panel of claim 1 , wherein:
the circuit layer includes an additional inorganic layer between the first inorganic layer and the second inorganic layer, and a side portion of the additional inorganic layer adjacent to the module hole is covered with the organic layer.

4 . The display panel of claim 1 , wherein the circuit layer includes:
an additional organic layer between the organic layer and the organic light emitting area and including a contact hole penetrating the additional organic layer; and a connection electrode connecting the transistor to the organic light emitting area through the contact hole, wherein the additional organic layer covers the organic layer.

5 . The display panel of claim 1 , wherein a side portion of each of the first inorganic layer and the second inorganic layer has a closed loop shape enclosing the first groove.

6 . The display panel of claim 5 , wherein the first groove is between the module hole and the side portion and has a closed loop shape enclosing the module hole.

7 . The display panel of claim 1 , further comprising:
an encapsulation layer on the device layer, wherein the encapsulation layer includes a first inorganic encapsulation layer covering the device layer, a second inorganic encapsulation layer, and an organic encapsulation layer between the first inorganic encapsulation layer and the second inorganic encapsulation layer, and wherein the first groove defines an internal space formed by at least one of the first inorganic encapsulation layer and the second inorganic encapsulation layer covering an inner surface of the recessed region and an inner surface of the opening.

8 . The display panel of claim 7 , further comprising:
a planarization layer filling the internal space and disposed on the second inorganic encapsulation layer to provide a flat surface, along with the second inorganic encapsulation layer, wherein the module hole penetrates the planarization layer.

9 . The display panel of claim 8 , wherein the planarization layer includes a same material as the organic encapsulation layer.

10 . The display panel of claim 8 , further comprising:
an input sensing area on the encapsulation layer and including an organic sensing layer covering a sensing electrode, wherein the planarization layer includes a same material as the organic sensing layer.

11 . The display panel of claim 7 , further comprising:
a second groove overlapped with the hole peripheral region and between the side portion of each of the first inorganic layer and the second inorganic layer and the first groove to enclose the module hole, wherein the second groove is a portion of the base substrate recessed from a top surface of the barrier layer and is covered with the first inorganic encapsulation layer, and wherein an internal space of the second groove is filled with the organic encapsulation layer.

12 . The display panel of claim 7 , further comprising:
an additional pattern portion between the first inorganic encapsulation layer and a surface of the base substrate overlapped with the first groove, wherein the additional pattern portion includes at least one of organic materials or metal materials.

13 . The display panel of claim 1 , wherein:
a portion of the barrier layer, which covers a portion of the base substrate overlapped with the first groove, corresponds to a tip portion, and the tip portion is spaced apart from the side portion of each of the first inorganic layer and the second inorganic layer.

14 . The display panel of claim 13 , further comprising:
a dam portion between the first groove and the second groove, the dam portion covered by at least one of the first inorganic encapsulation layer and the second inorganic encapsulation layer, wherein the dam portion includes a same material as at least one of the insulating layers.

15 . An electronic device, comprising:
a base substrate including a display region and a peripheral region, the display region including a hole peripheral region and the peripheral region adjacent to the display region; a barrier layer covering the base substrate; a circuit layer, on the barrier layer, comprising a transistor and a plurality of insulating layers; a device layer including an organic light emitting element coupled to the circuit layer; a module hole overlapped with the hole peripheral region and penetrating the base substrate; and grooves overlapped with the hole peripheral region and spaced apart from each other, each of the grooves corresponding to a portion of the base substrate recessed from a top surface of the barrier layer and enclosing the module hole, wherein the insulating layers include: a first inorganic layer on the barrier layer and including an inorganic material, a second inorganic layer on the first inorganic layer and including an inorganic material, and an organic layer on the second inorganic layer and including an organic material, and wherein: a side portion of each of the first inorganic layer and the second inorganic layer, which are adjacent to the module hole, encloses the module hole, and the organic layer covers the side portion of each of the first inorganic layer and the second inorganic layer adjacent to the module hole.

16 . The electronic device of claim 15 , wherein:
the barrier layer and insulating layers are overlapped with each of the grooves and correspond to a tip portion, and the tip portion covers a portion of the base substrate overlapped with each of the grooves.

17 . The electronic device of claim 16 , wherein the tip portion is spaced apart from the side portion of each of the first inorganic layer and the second inorganic layer.

18 . The electronic device of claim 15 , further comprising:
an encapsulation layer including a first inorganic encapsulation layer covering the device layer, a second inorganic encapsulation layer on the first inorganic encapsulation layer, and an organic encapsulation layer between the first inorganic enc

Assignees

• Samsung Display Co Ltd

Inventors

• Choi Wonwoo
• Kim Sooyoun
• Seo Junghan
• Sung Wooyong
• Lee Seoyeon
• Lee Hyoungsub
• Chang Moonwon
• Chae Seunggun

Classifications

• H01L27/3276

  Electricity · mapped topic

• H01L51/5253

  Electricity · mapped topic

• H01L27/3258

  Electricity · mapped topic

• H01L27/3246 Primary

  Electricity · mapped topic

• H10K59/805

  Electrodes · CPC title