Hybrid voltage regulator using bandwidth suppressed series regulator and associated voltage regulating method

Patent metadata

Field	Value
Publication number	US-2020142436-A1
Application number	US-201916590391-A
Country	US
Kind code	A1
Filing date	Oct 2, 2019
Priority date	Nov 7, 2018
Publication date	May 7, 2020
Grant date	—

Abstract

A voltage regulator provides a load device with a regulated voltage, and includes a first regulator circuit, a second regulator circuit, a first control loop circuit, and a second control loop circuit. The load device and the first regulator circuit are connected in series. The load device and the second regulator circuit are connected in parallel. The first control loop circuit adaptively adjusts a first bias voltage of the first regulator circuit in response to a load condition at the output node of the voltage regulator, wherein the first control loop circuit includes a capacitor coupled between the first power rail and an output node of a feedback amplifier. The second control loop circuit adaptively adjusts a second bias voltage of the second regulator circuit in response to the load condition at the output node of the voltage regulator.

First claim

What is claimed is:

1 . A voltage regulator for providing a load device with a regulated voltage, comprising:
a first regulator circuit, coupled between a first power rail and an output node of the voltage regulator, wherein the regulated voltage is generated at the output node of the voltage regulator, and the load device and the first regulator circuit are connected in series; a second regulator circuit, coupled between a second power rail and the output node of the voltage regulator, wherein the load device and the second regulator circuit are connected in parallel; a first control loop circuit, arranged to adaptively adjust a first bias voltage of the first regulator circuit in response to a load condition at the output node of the voltage regulator, wherein the first control loop circuit comprises:
a feedback amplifier, arranged to generate the first bias voltage at an output node of the feedback amplifier; and
a capacitor, coupled between the first power rail and the output node of the feedback amplifier; and
a second control loop circuit, arranged to adaptively adjust a second bias voltage of the second regulator circuit in response to the load condition at the output node of the voltage regulator.

2 . The voltage regulator of claim 1 , wherein the first regulator circuit comprises:
a transistor, having a control terminal, a first connection terminal, and a second connection terminal, wherein the control terminal is arranged to receive the first bias voltage, the first connection terminal is coupled to the first power rail, and the second connection terminal is coupled to the output node of the voltage regulator; wherein a first end and a second end of the capacitor are coupled to the first power rail and the control terminal of the transistor, respectively.

3 . The voltage regulator of claim 2 , wherein the first end of the capacitor is directly connected to the first power rail, and the second end of the capacitor is directly connected to the control terminal of the transistor.

4 . The voltage regulator of claim 1 , wherein the feedback amplifier is a single-ended input, single-ended output amplifier.

5 . The voltage regulator of claim 1 , wherein the feedback amplifier is a differential input, single-ended output amplifier.

6 . The voltage regulator of claim 1 , wherein a bandwidth of the first control loop circuit is different from a bandwidth of the second control loop circuit.

7 . The voltage regulator of claim 6 , wherein the bandwidth of the first control loop circuit is lower than the bandwidth of the second control loop circuit.

8 . The voltage regulator of claim 7 , wherein the first regulator circuit comprises:
a transistor, having a control terminal, a first connection terminal, and a second connection terminal, wherein the control terminal is arranged to receive the first bias voltage, the first connection terminal is coupled to the first power rail, and the second connection terminal is coupled to the output node of the voltage regulator; wherein due to discrepancy between the bandwidth of the first control loop circuit and the bandwidth of the second control loop circuit, the first bias voltage adjusted under the bandwidth of the first control loop circuit is regarded as a constant voltage under the bandwidth of the second control loop circuit.

9 . The voltage regulator of claim 8 , wherein the transistor is regarded as a current source for the second regulator circuit under the bandwidth of the second control loop circuit.

10 . The voltage regulator of claim 1 , wherein the load device is a digital intensive circuit.

11 . A voltage regulating method for providing a load device with a regulated voltage, comprising:
performing a voltage-mode voltage regulation operation upon the regulated voltage according to a first bias voltage, wherein the regulated voltage is generated at an output node that is coupled to the load device; performing a current-mode voltage regulation operation upon the regulated voltage according to a second bias voltage; adaptively adjusting the first bias voltage of the voltage-mode voltage regulation operation in response to a load condition at the output node, comprising:
generating, by a feedback amplifier, the first bias voltage at an output node of the feedback amplifier, wherein a capacitor is coupled between a power rail and the output node of the feedback amplifier; and
adaptively adjusting the second bias voltage of the current-mode voltage regulation operation in response to the load condition at the output node.

12 . The voltage regulating method of claim 11 , wherein the voltage-mode voltage regulation operation is performed by a regulator circuit comprising:
a transistor, having a control terminal, a first connection terminal, and a second connection terminal, wherein the control terminal is arranged to receive the first bias voltage, the first connection terminal is coupled to the power rail, and the second connection terminal is coupled to the output node; wherein a first end and a second end of the capacitor are coupled to the first power rail and the control terminal of the transistor, respectively.

13 . The voltage regulating method of claim 12 , wherein the first end of the capacitor is directly connected to the first power rail, and the second end of the capacitor is directly connected to the control terminal of the transistor.

14 . The voltage regulating method of claim 11 , wherein the feedback amplifier is a single-ended input, single-ended output amplifier.

15 . The voltage regulating method of claim 11 , wherein the feedback amplifier is a differential input, single-ended output amplifier.

16 . The voltage regulating method of claim 11 , wherein a first loop bandwidth of adaptively adjusting the first bias voltage of the voltage-mode voltage regulation operation is different from a second loop bandwidth of adaptively adjusting the first second voltage of the current-mode voltage regulation operation.

17 . The voltage regulating method of claim 16 , wherein the first loop bandwidth is lower than the second loop bandwidth.

18 . The voltage regulating method of claim 17 , wherein the voltage-mode voltage regulation operation is performed by a regulator circuit comprising:
a transistor, having a control terminal, a first connection terminal, and a second connection terminal, wherein the control terminal is arranged to receive the first bias voltage, the first connection terminal is coupled to the power rail, and the second connection terminal is coupled to the output node of the voltage regulator; wherein due to discrepancy between the first loop bandwidth and the second loop bandwidth, the first bias voltage adjusted under the first loop bandwidth is regarded as a constant voltage under the second loop bandwidth.

19 . The voltage regulating method of claim 18 , wherein the transistor is regarded as a current source for the current-mode voltage regulation operation under the second loop bandwidth.

20 . The voltage regulating method of claim 11 , wherein the load device is a digital intensive circuit.

Assignees

• Mediatek Inc

Inventors

• Chang Chun-Wei
• Yang Song-Yu
• Lin Ang-Sheng

Classifications

• H03F3/45273

  Mirror types · CPC title

• G05F1/575 Primary

  characterised by the feedback circuit · CPC title

• G05F1/618 Primary

  using semiconductor devices in series and in parallel with the load as final control devices (G05F1/461 takes precedence) · CPC title

• G05F1/561 Primary

  Voltage to current converters (amplifiers H03F) · CPC title