Variable resistance memory device

Patent metadata

Field	Value
Publication number	US-2020111835-A1
Application number	US-201916394139-A
Country	US
Kind code	A1
Filing date	Apr 25, 2019
Priority date	Oct 5, 2018
Publication date	Apr 9, 2020
Grant date	—

Abstract

A variable resistance memory device includes: a substrate including a peripheral region and a core region, the core region including a far region spaced apart from the peripheral region and a near region between the far region and the peripheral region; first conductive lines disposed on the substrate and extending in a first direction; second conductive lines disposed on the first conductive lines and extending in a second direction intersecting the first direction, and memory cells disposed between the first and second conductive lines on the core region. The memory cells include a near memory cell disposed on the near region, and a far memory cell disposed on the far region, wherein a resistance or threshold voltage of the near memory cell, controlling connection of each of the memory cells to a corresponding one of the second conductive lines, is different from that of the far memory cell.

First claim

What is claimed is:

1 . A variable resistance memory device comprising:
a substrate comprising a peripheral region and a core region, the core region comprising a far region spaced apart from the peripheral region and a near region between the far region and the peripheral region; first conductive lines disposed on the substrate and extending in a first direction; second conductive lines disposed on the first conductive lines and extending in a second direction; and memory cells disposed between the first and second conductive lines on the core region, wherein the memory cells comprise:
a near memory cell disposed on the near region; and
a far memory cell disposed on the far region, and
wherein a resistance or threshold voltage of the near memory cell, controlling connection of each of the memory cells to a corresponding one of the second conductive lines, is different from a resistance or threshold voltage of the far memory cell.

2 . The variable resistance memory device of claim 1 , wherein the resistance or threshold voltage of the near memory cell is greater than the resistance or threshold voltage of the far memory cell.

3 . The variable resistance memory device of claim 1 , wherein the near memory cell and the far memory cell comprise a first variable resistance element and a second variable resistance element, respectively, and
wherein a Ge content of the first variable resistance element is higher than a Ge content of the second variable resistance element.

4 . The variable resistance memory device of claim 3 , wherein the first variable resistance element comprises GeTe or GeSbTe, and
wherein the second variable resistance element comprises SbTe.

5 . The variable resistance memory device of claim 3 , wherein a sum of resistances of the first variable resistance element and corresponding ones of the first and second conductive lines is substantially similar to a sum of resistances of the second variable resistance element and corresponding ones of the first and second conductive lines.

6 . The variable resistance memory device of claim 1 , wherein the near memory cell and the far memory cell comprise a first switching element and a second switching element, respectively, having different dimensions or material characteristics.

7 . The variable resistance memory device of claim 6 , wherein the first switching element is thicker than the second switching element.

8 . The variable resistance memory device of claim 7 , wherein the near memory cell further comprises a first top electrode between the first switching element and a corresponding one of the second conductive lines,
wherein the far memory cell further comprises a second top electrode between the second switching element and a corresponding one of the second conductive lines, and wherein the first top electrode is thinner than the second top electrode.

9 . The variable resistance memory device of claim 6 , wherein a Ge content of the first switching element is greater than a Ge content of the second switching element.

10 . The variable resistance memory device of claim 6 , wherein a content of Ge, N, Si, or C in the first switching element is greater than a content of Ge, N, Si, or C in the second switching element.

11 . The variable resistance memory device of claim 6 , wherein the first switching element includes AsTeGe, AsSeGe, AsTeGeSe, AsSeGeSi, AsSeGeC, AsTeGeSi, AsTeGeS, AsTeGeSiIn, AsTeGeSiP, AsTeGeSiSbS, AsTeGeSiSbP, AsTeGeSeSb, AsTeGeSeSi, AsTeGeSiSeNS, SeTeGeSi, GeSbTeSe, GeBiTeSe, GeAsSbSe, GeAsBiTe, or GeAsBiSe, and
wherein the second switching element includes AsTe, AsSe, SnTe, SnSe, ZnTe, ZnSe, or AsTeSe.

12 . The variable resistance memory device of claim 1 , wherein the core region further comprises a middle region between the near region and the far region,
wherein the memory cells further comprise a middle memory cell disposed on the middle region, and wherein a resistance or threshold voltage of the middle memory cell is greater than the resistance or threshold voltage of the far memory cell, and is less than the resistance or threshold voltage of the near memory cell.

13 . A variable resistance memory device comprising:
a substrate comprising a peripheral region and a core region, the core region comprising a far region spaced apart from the peripheral region and a near region between the far region and the peripheral region; first conductive lines disposed on the substrate and extending in a first direction; second conductive lines disposed on the first conductive lines and extending in a second direction; and memory cells disposed between the first and second conductive lines on the core region, wherein the memory cells comprise:
a near memory cell disposed on the near region and comprising a first variable resistance element and a first switching element; and
a far memory cell disposed on the far region and comprising a second variable resistance element and a second switching element,
wherein a resistance or threshold voltage of the first variable resistance element, controlling connection of the near memory cells to a corresponding one of the second conductive lines is different from a resistance or threshold voltage of the second variable resistance element controlling connection of the far memory cells to a corresponding one of the second conductive lines.

14 . The variable resistance memory device of claim 13 , wherein a Ge content of the first variable resistance element is higher than a Ge content of the second variable resistance element.

15 . The variable resistance memory device of claim 13 , wherein the first variable resistance element includes GeTe or GeSbTe, and
wherein the second variable resistance element includes SbTe.

16 . The variable resistance memory device of claim 13 , wherein the first switching element is thicker than the second switching element.

17 . The variable resistance memory device of claim 13 , wherein the near memory cell further comprises a first top electrode between the first switching element and the corresponding one of the conductive second lines,
wherein the far memory cell further comprises a second top electrode between the second switching element and the corresponding one of the second conductive lines, and wherein the first top electrode is thinner than the second top electrode.

18 . The variable resistance memory device of claim 13 , wherein a Ge content of the first switching element is greater than a Ge content of the second switching element.

19 . A variable resistance memory device comprising:
a plurality of memory cells provided between a first conductive line and a plurality of second conductive lines corresponding to the memory cells, respectively; wherein the first conductive line and the second conductive lines have line resistances which increase according to a current conduction distance from a current source, wherein each of the memory cells comprises:
a near memory cell which comprises a first variable resistance element and a first switching element disposed on or beneath the first variable resistance element, and is connected to the first conductive line and a corresponding one of the second conductive lines; and
a far memory cell which comprises a second variable resistance element and a second switching element disposed on or beneath the second variable resistance element, and connected to the first conductive line and a corresponding one of the second conductive lines,
wherein a resistance of at least

Assignees

• Samsung Electronics Co Ltd

Inventors

• Cho Junghyun
• Jung You-Jin
• Terai Masayuki
• Yun Jinchan

Classifications

• H01L45/143

  Electricity · mapped topic

• H01L45/06

  Electricity · mapped topic

• H01L45/1253

  Electricity · mapped topic

• H01L27/2427 Primary

  Electricity · mapped topic

• H01L45/1683

  Electricity · mapped topic