Data processing device communicating with memory device and data processing method

Patent metadata

Field	Value
Publication number	US-2020097175-A1
Application number	US-201916457132-A
Country	US
Kind code	A1
Filing date	Jun 28, 2019
Priority date	Sep 21, 2018
Publication date	Mar 26, 2020
Grant date	—

Abstract

A data processing device communicating with a memory device via a memory interface includes: at least one data processor configured to generate first data; a data converter configured to generate second data written to the memory device from the first data; and a controller configured to enable the data converter to generate the second data having a size less than that of the first data to reduce power consumption in at least one of the memory device or the memory interface.

First claim

1 . A data processing device configured to communicate with a memory device via a memory interface, the data processing device comprising:
at least one data processor configured to generate first data; a data converter configured to generate second data written to the memory device from the first data; and a controller configured to enable the data converter to generate the second data having a size that is less than a size of the first data, to reduce power consumption of at least one of the memory device or the memory interface.

2 . The data processing device of claim 1 , wherein the controller is further configured to disable the data converter to generate the second data that is the same as the first data, to improve the performance of the data processing device.

3 . The data processing device of claim 1 , further comprising a lookup table that stores information about first electric power consumed by at least one of the memory device or the memory interface by the second data that is the same as the first data,
wherein the controller is configured to control the data converter based on the information about the first electric power.

4 . The data processing device of claim 3 , further comprising a plurality of processors configured to generate the first data,
wherein the information comprises pieces, and each piece respectively corresponds to the plurality of processors, and the controller is configured to control the data converter based on the pieces of the information.

5 . The data processing device of claim 1 , further comprising a lookup table that stores information about first electric power consumed by at least one of the memory device or the memory interface by the second data having a size less than a size of the first data,
wherein the controller is configured to control the data converter based on the information about the first electric power.

6 . The data processing device of claim 5 , wherein the data converter is configured to generate the second data from the first data according to one of a plurality of conversion methods,
the information comprises pieces respectively corresponding to the plurality of conversion methods, and the controller is configured to control the data converter based on the pieces of the information.

7 . The data processing device of claim 1 , wherein the controller receives a mode signal indicating a power mode of the data processing device and is configured to control the data converter based on the mode signal.

8 . The data processing device of claim 7 , wherein the data converter is configured to generate the second data from the first data according to one of a plurality of conversion methods, and
the controller further receives a type signal indicating one of the plurality of conversion methods and is configured to control the data converter further based on the type signal.

9 - 12 . (canceled)

13 . The data processing device of claim 1 , wherein the controller is configured to obtain memory power information corresponding to at least one of the power consumption of the memory device or the memory interface and to control the data converter based on the memory power information.

14 . The data processing device of claim 1 , wherein the controller is configured to obtain interface bandwidth information corresponding to an available bandwidth of the memory interface and to enable the data converter when the available bandwidth is less than a value set in advance.

15 . The data processing device of claim 1 , wherein the controller is configured to obtain memory space information corresponding to an available space of the memory device and to enable the data converter when the available space is less than a reference value set in advance.

16 . The data processing device of claim 1 , wherein the data converter is configured to generate the second data by mapping the first data to the second data based on a mapping table.

17 . The data processing device of claim 1 , wherein the data converter is configured to generate the second data by reducing a bit width of the first data.

18 . The data processing device of claim 1 , wherein the data converter is configured to generate the second data by puncturing the first data.

19 . A data processing device configured to process a signal transmitted through a communication channel, the data processing device comprising:
a data processor configured to generate first data by processing the signal transmitted through the communication channel; a data converter configured to generate second data written to a memory device via the memory interface from the first data, configured to generate the second data having a size less than a size of the first data when being enabled, and configured to generate the second data that is the same as the first data when being disabled; and a controller configured to control the data converter based on channel information that is obtained by processing the signal transmitted through the communication channel.

20 . The data processing device of claim 19 , further comprising a symbol detector configured to extract a symbol from the signal transmitted through the communication channel,
wherein the data processor comprises a retransmission combiner configured to generate a log likelihood ratio (LLR) as the first data from the extracted symbol.

21 - 23 . (canceled)

24 . The data processing device of claim 19 , wherein the controller is configured to extract mode information indicating a power mode from the signal transmitted through the communication channel and configured to control the data converter based on the mode information.

25 . The data processing device of claim 24 , wherein the mode information comprises a block error rate (BLER), and
the controller is configured to obtain the BLER and to control the data converter based on the BLER.

26 . The data processing device of claim 24 , wherein the mode information comprises a data decoding level, and
the controller is configured to control the data converter based on the data decoding level.

27 . A method of communicating with a memory device via a memory interface, the method comprising:
generating first data to be stored in the memory device; generating second data by converting the first data; and writing the second data to the memory device, wherein the generating of the second data comprises generating the second data having a size less than a size of the first data to reduce power consumption in at least one of the memory device or the memory interface.

28 - 32 . (canceled)

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kang Hyun-Gu
• Kim Se-Hyoung

Classifications

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F3/0634

  by changing the state or mode of one or more devices · CPC title

• G06F3/0625 Primary

  Power saving in storage systems · CPC title

• G06F3/0655

  Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices · CPC title

• G06F3/0604 Primary

  Improving or facilitating administration, e.g. storage management · CPC title