Polling process for monitoring interdependent hardware components

US2020042622A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2020042622-A1
Application numberUS-201816050818-A
CountryUS
Kind codeA1
Filing dateJul 31, 2018
Priority dateJul 31, 2018
Publication dateFeb 6, 2020
Grant date

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Abstract

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Systems and methods are provided to implement a polling process for monitoring a system of interdependent hardware components. A shared aggregate state data structure comprising information of an aggregate state of the interdependent hardware components is maintained in a system memory. A poller loop process generates and utilizes two local instances in system memory of the shared aggregate state data structure, including a current state data structure and a previous state data structure. The current state data structure is utilized during a lock-free polling routine to store current aggregate state data of the interdependent hardware components, while other executing threads outside the poller loop process can access the shared aggregate state data structure. The shared aggregate state data structure is updated by performing a merge of state information contained in the shared aggregate state, current aggregate state, and previous aggregate state data structures.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method, comprising: maintaining a first data structure in a system memory, wherein the first data structure comprises aggregate state information of a set of interdependent hardware components of a computing system; performing a poller loop process to update the aggregate state information contained in the first data structure, wherein performing the poller process comprises: acquiring a lock on the first data structure in the system memory; copying the aggregate state information of the first data structure into a second data structure and a third data structure in the system memory, wherein the aggregate state information of the second data structure is maintained as previous aggregate state information, and wherein the third data structure is maintained and updated with current aggregate state information; releasing the lock on the first data structure in the system memory after copying the aggregate state information of the first data structure into the second and third data structures in the system memory; performing a lock-free poller routine to collect current aggregate state information of the set of interdependent hardware components of the computing system, and store the currently collected aggregate state information into the third data structure in the system memory; reacquiring the lock on the first data structure in the system memory; updating the aggregate state information of the first data structure based on state information contained in at least one of the second data structure and the third data structure; and releasing the reacquired lock on the first data structure after updating the aggregate state information of the first data structure. 2 . The method of claim 1 , further comprising: determining whether the currently collected aggregate state information comprises inconsistent device state information; and discarding the currently collected aggregate state information in response to determining that the currently collected aggregate state information comprises inconsistent device state information. 3 . The method of claim 1 , further comprising: before updating the aggregate state information of the first data structure, determining whether the currently collected aggregate state information in the third data structure in the system memory is inconsistent with the aggregate state information of the first data structure in the system memory; and discarding the currently collected aggregate state information in response to determining that the currently collected aggregate state information in the third data structure in the system memory is inconsistent with the aggregate state information of the first data structure in the system memory. 4 . The method of claim 1 , further comprising: before updating the aggregate state information of the first data structure, determining whether the aggregate state information of the first data structure comprises device state information which has been modified; and discarding the currently collected aggregate state information in response to determining that the aggregate state information of the first data structure comprises device state information which has been modified. 5 . The method of claim 4 , wherein determining whether the aggregate state information of the first data structure comprises device state information which has been modified comprises determining if a flag for the first data structure has been asserted by an application thread, wherein the asserted flag indicates that the device state information in the first data structure has been modified by the application thread. 6 . The method of claim 1 , wherein updating the aggregate state information of the first data structure based on state information contained in at least one of the second data structure and the third data structure comprises: determining whether a data value in a given field of the first data structure has changed relative to a data value in a corresponding field of the previous state maintained in the second data structure; and maintaining the data value in the given field of the first data structure in response to determining that the data value in a given field of the first data structure has changed relative to the data value in the corresponding field of the previous state maintained in the second data structure. 7 . The method of claim 6 , further comprising updating the data value in the given field of the first data structure using a current data value in a corresponding field of the current state maintained in the third data structure in system memory, in response to determining that the data value in a given field of the first data structure has not changed relative to the data value in the corresponding field of the previous state maintained in the second data structure. 8 . The method of claim 1 , wherein the second data structure maintains a read-only copy of the aggregate state information. 9 . The method of claim 1 , wherein the set of interdependent hardware components comprises storage devices of a data storage system. 10 . An article of manufacture comprising a processor-readable storage medium having stored therein program code of one or more software programs, wherein the program code is executable by one or more processors to implement a process comprising: maintaining a first data structure in a system memory, wherein the first data structure comprises aggregate state information of a set of interdependent hardware components of a computing system; performing a poller loop process to update the aggregate state information contained in the first data structure, wherein performing the poller process comprises: acquiring a lock on the first data structure in the system memory; copying the aggregate state information of the first data structure into a second data structure and a third data structure in the system memory, wherein the aggregate state information of the second data structure is maintained as previous aggregate state information, and wherein the third data structure is maintained and updated with current aggregate state information; releasing the lock on the first data structure in the system memory after copying the aggregate state information of the first data structure into the second and third data structures in the system memory; performing a lock-free poller routine to collect current aggregate state information of the set of interdependent hardware components of the computing system, and store the currently collected aggregate state information into the third data structure in the system memory; reacquiring the lock on the first data structure in the system memory; updating the aggregate state information of the first data structure based on state information contained in at least one of the second data structure and the third data structure; and releasing the reacquired lock on the first data structure after updating the aggregate state information of the first data structure. 11 . The article of manufacture of claim 10 , further comprising program code which is executable by the one or more processors to implement a process comprising: determining whether the currently collected aggregate state information comprises inconsistent device state information; and discarding the currently collected aggregate state information in response to determining that the currently collected aggregate state information comprises inconsistent device state information. 12 . The article of manufacture of claim 10 , further comprising program code which is executable by the one or more processors to implement a process comprising

Assignees

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Classifications

  • Locking methods, e.g. distributed locking or locking implementation details · CPC title

  • Updates performed during online database operations; commit processing · CPC title

  • Physics · mapped topic

  • Physics · mapped topic

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What does patent US2020042622A1 cover?
Systems and methods are provided to implement a polling process for monitoring a system of interdependent hardware components. A shared aggregate state data structure comprising information of an aggregate state of the interdependent hardware components is maintained in a system memory. A poller loop process generates and utilizes two local instances in system memory of the shared aggregate sta…
Who is the assignee on this patent?
Emc Ip Holding Co Llc
What technology area does this patent fall under?
Primary CPC classification G06F16/2343. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Feb 06 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).