Packet backpressure detection method, apparatus, and device

Patent metadata

Field	Value
Publication number	US-2020042425-A1
Application number	US-201916653326-A
Country	US
Kind code	A1
Filing date	Oct 15, 2019
Priority date	Sep 30, 2016
Publication date	Feb 6, 2020
Grant date	—

Abstract

A packet backpressure detection method and apparatus are provided. The method includes: a device which having a Peripheral Component Interconnect Express (PCIe) port storing a plurality of packets for transmission in a packet queue and storing a packet that is to be transmitted next in a first buffer, where the queue comprises a plurality of packets that are to be transmitted via the PCIe port; and the queue is stored in a second buffer; recording a storage duration of each packet stored in the first buffer, and accumulating the storage duration of each packet stored in the first buffer; removing the packet from the first buffer after the packet is transmitted via the PCIe port; and generating an indication of packet pressure at the PCIe port based on the accumulated storage duration.

First claim

What is claimed is:

1 . A packet backpressure detection method by a device having a Peripheral Component Interconnect Express (PCIe) port, comprising:
storing a plurality of packets that are to be transmitted via the PCIe port in a packet queue in a first buffer and storing a packet that is to be transmitted next in a second buffer; recording a storage duration of each packet stored in the second buffer; accumulating the storage duration of each packet stored in the second buffer as an accumulated storage duration; generating an indication of packet pressure at the PCIe port based on the accumulated storage duration.

2 . The method according to claim 1 , the generating an indication of packet pressure at the PCIe port based on the accumulated storage duration, comprising:
when the accumulated storage duration reaches the first value determining that packet backpressure occurs at the PCIe port; generating the indication of packet pressure at the PCIe port.

3 . The method according to claim 1 , wherein the second buffer stores a maximum of one packet at any moment.

4 . The method according to claim 1 , wherein the second buffer stores at least two packets of one packet at any moment, the first buffer is smaller in size than the second buffer.

5 . The method according to claim 1 , the method further comprises:
resetting the accumulated storage duration to 0 in a preset condition.

6 . The method according to claim 5 , wherein the resetting the accumulated storage duration to 0 in a preset condition, comprising:
setting a reset timer to record time; resetting the accumulated storage duration to 0 when a time recorder by the reset timer reaches a second value.

7 . The method according to claim 5 , wherein the resetting the accumulated storage duration to 0 in a preset condition, comprising:
recording a quantity of packets that have been stored in the second buffer, and when the quantity reaches a third value, resetting the accumulated storage duration to 0.

8 . The method according to claim 1 , wherein the storage duration that is of each packet and is successively recorded by the device forms a duration queue, and the method further comprises:
when a length of the duration queue reaches a fourth value, deleting the earliest-recorded storage duration from the duration queue; and subtracting, from the accumulated storage duration, the earliest-recorded storage duration that is deleted from the duration queue.

9 . The method according to claim 1 , wherein the storing a packet that is to be transmitted next in a second buffer, comprising:
when each packet in a packet queue in a first direction of the PCIe port becomes a packet that is to be transmitted next in the second buffer at the PCIe port, storing, in the second buffer, the packet that needs to be sent in the first direction, wherein the first direction is an upstream direction or a downstream direction of the PCIe port.

10 . The method according to claim 1 , the method further comprises:
when each packet in a packet queue in a second direction of the PCIe port becomes a packet that is to be transmitted next in the second buffer at the PCIe port, storing, in a third buffer, the packet that needs to be sent in the second direction, wherein the second direction is opposite to the first direction, the packet stored in the third buffer is removed from the third buffer after being sent by using the PCIe port, and the third buffer stores a maximum of one packet at any moment; recording storage duration of each packet stored in the third buffer, and accumulating the recorded storage duration of each packet stored in the third buffer; removing the packet from the third buffer after the packet is transmitted via the PCIe port; and when the second accumulated duration reaches the sixth value, generating a second indication of packet pressure at the PCIe port based on the second accumulated storage duration.

11 . The method according to claim 1 , wherein the method further comprises:
removing the packet from the second buffer after the packet is transmitted via the PCIe port.

12 . A packet backpressure detection device, comprising a processor, a memory, and a PCIe port, the memory having a plurality of instructions stored thereon, that when executed by the processor, cause the processor to:
store a plurality of packets that are to be transmitted via the PCIe port in a packet queue in a first buffer; storing a packet that is to be transmitted next in a second buffer; record a storage duration of each packet stored in the second buffer; accumulate the storage duration of each packet stored in the second buffer as an accumulated storage duration; generate an indication of packet pressure at the PCIe port based on the accumulated storage duration.

13 . The packet backpressure detection device according to claim 12 , wherein when executed by the processor, cause the processor to:
when the accumulated storage duration reaches the first value determine that packet backpressure occurs at the PCIe port; generate the indication of packet pressure at the PCIe port.

14 . The packet backpressure detection device according to claim 12 , wherein the second buffer stores a maximum of one packet at any moment.

15 . The packet backpressure detection device according to claim 12 , wherein the second buffer stores at least two packets of one packet at any moment, the first buffer is smaller in size than the second buffer.

16 . The packet backpressure detection device according to claim 12 , wherein when executed by the processor, cause the processor to:
set a reset timer to record time; reset the accumulated storage duration to 0 when a time recorder by the reset timer reaches a second value.

17 . The packet backpressure detection device according to claim 16 , wherein when executed by the processor, cause the processor to:
record a quantity of packets that have been stored in the second buffer; and when the quantity reaches a third value, reset the accumulated storage duration to 0.

18 . The packet backpressure detection device according to claim 16 , wherein when executed by the processor, cause the processor to:
when a length of the duration queue reaches a fourth value, delete the earliest-recorded storage duration from the duration queue; and subtract from the accumulated storage duration, the earliest-recorded storage duration that is deleted from the duration queue.

19 . The packet backpressure detection device according to claim 12 , wherein when executed by the processor, cause the processor to:
when each packet in a packet queue in a first direction of the PCIe port becomes a packet that is to be transmitted next in the second buffer at the PCIe port, store, in the second buffer, the packet that needs to be sent in the first direction, wherein the first direction is an upstream direction or a downstream direction of the PCIe port; and when each packet in a packet queue in a second direction of the PCIe port becomes a packet that is to be transmitted next in the second buffer at the PCIe port, store, in a third buffer, the packet that needs to be sent in the second direction, wherein the second direction is opposite to the first direction, the packet stored in the third buffer is removed from the third buffer after being sent by using the PCIe port, and the third buffer stores a maximum of one packet at any moment; record storage duration of each packet stored in the third buffer; accumulate the recorded storage duration

Assignees

• Huawei Tech Co Ltd

Inventors

• Zhang Bin
• Chen Ligang
• Chen Jiahuai
• Xu Lixia

Classifications

• G06F13/4269

  using a handshaking protocol, e.g. Centronics connection · CPC title

• G06F13/4022

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

• G06F13/20

  for access to input/output bus · CPC title

• G06F13/4282

  on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

• G06F11/3041

  where the computing system component is an input/output interface (interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units G06F13/00) · CPC title