Low power imaging system with single photon avalanche diode photon counters and ghost image reduction
US-9210350-B2 · Dec 8, 2015 · US
US2020007804A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2020007804-A1 |
| Application number | US-201916503383-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jul 3, 2019 |
| Priority date | Feb 7, 2014 |
| Publication date | Jan 2, 2020 |
| Grant date | — |
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A control pulse is generated a first control signal line coupled to a transfer gate of a pixel to enable photocharge accumulated within a photosensitive element of the pixel to be transferred to a floating diffusion node, the first control signal line having a capacitive coupling to the floating diffusion node. A feedthrough compensation pulse is generated on a second signal line of the pixel array that also has a capacitive coupling to the floating diffusion node. The feedthrough compensation pulse is generated with a pulse polarity opposite the pulse polarity of the control pulse and is timed to coincide with the control pulse such that capacitive feedthrough of the control pulse to the floating diffusion node is reduced.
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1 - 20 . (canceled) 21 . An integrated-circuit image sensor having pixels disposed in constituent rows and columns of a pixel array, the integrated-circuit image sensor comprising: a first photodetector that accumulates photocharge in response to incident light; a first and second capacitive nodes; a first transfer gate disposed between the photodetector and the first capacitive node and having a control terminal coupled to a transfer-gate control line that extends in a row-wise direction across the pixel array; an output transistor having a control terminal coupled to the first capacitive node and an output terminal switchably coupled to a column output line that extends in a column-wise direction across the pixel array; and a conversion-gain transistor coupled between the first and second capacitive nodes and having a control terminal coupled to a conversion-gain-select line that extends in the column-wise direction across the pixel array. 22 . The integrated-circuit image sensor of claim 21 wherein the conversion-gain control transistor switchably couples the first and second capacitive nodes in parallel in response to assertion of conversion-gain-select signal on the conversion-gain-select line. 23 . The integrated-circuit image sensor of claim 21 further comprising comparator circuitry having a first input coupled to the column output line, a second input coupled to receive a threshold voltage, and an output coupled to the conversion-gain-select line. 24 . The integrated-circuit image sensor of claim 23 further comprising control circuitry to: assert a first transfer-enable pulse on the transfer-gate control line to enable transfer of accumulated photocharge from the photodetector to the first capacitive node via the first transfer gate; switchably couple the output terminal of the output transistor to the column output line to produce, on the column output line, an analog output signal having an amplitude corresponding to the accumulated photocharge; and enable the comparator circuitry to assert a conversion-gain-adjust pulse on the conversion-gain-select line if the amplitude of the analog output signal exceeds the threshold voltage. 25 . The integrated-circuit image sensor of claim 24 wherein the control circuitry is further to assert a second transfer-enable pulse on the transfer-gate control line, concurrently with assertion of the conversion-gain-adjust pulse by the comparator circuitry, if the amplitude of the analog output signal exceeds the threshold voltage. 26 . The integrated-circuit image sensor of claim 25 wherein transfer of accumulated photocharge from the first capacitive node via the first transfer gate is characterized by a first conversion gain and wherein assertion of the second transfer-enable pulse on the transfer-gate control line enables transfer of a residual portion of the accumulated photocharge to at least the second capacitive node, the transfer of the residual portion of the accumulated photocharge being characterized by a second conversion gain that is lower than the first conversion gain. 27 . The integrated-circuit image sensor of claim 21 wherein the first photodetector, first and second capacitive nodes, first transfer gate, output transistor, and conversion-gain transistor are constituent elements of a first pixel within the pixel array, and wherein each other pixel of the pixel array is constituted by a respective other photodetector, other first and second capacitive nodes, other transfer gate, other output transistor and other conversion-gain transistor. 28 . The integrated-circuit image sensor of claim 21 further comprising a second photodetector and a second transfer gate coupled between the second photodetector and the first capacitive node. 29 . The integrated-circuit image sensor of claim 28 wherein the first photodetector and first transfer gate constitute elements of a first pixel within the pixel array, the second photodetector and the second transfer gate constitute elements of a second pixel within the pixel array and the first and second capacitive nodes, at least, are shared by the first and second pixels. 30 . The integrated-circuit image sensor of claim 21 wherein the second capacitive node has a higher capacitance than the first capacitive node. 31 . An integrated-circuit image sensor having pixels disposed in constituent rows and columns of a pixel array, the integrated-circuit image sensor comprising: a photodetector that accumulates photocharge throughout an exposure interval; a first and second capacitive nodes; a transfer gate disposed between the photodetector and the first capacitive node and having a control terminal coupled to a transfer-gate control line that extends in a row-wise direction across the pixel array; an output transistor having a control terminal coupled to the first capacitive node and an output terminal switchably coupled to a column output line that extends in a column-wise direction across the pixel array; a conversion-gain transistor coupled between the first and second capacitive nodes and having a control terminal coupled to a conversion-gain-select line; and control circuitry to generate in succession, at conclusion of the exposure interval: a high-conversion-gain readout signal on the column output line by driving the transfer-gate control line to a state that enables photocharge conduction via the transfer gate while driving the conversion-gain-select line to a first state that renders the conversion-gain transistor in a non-conducting state to electrically isolate the second capacitive node from the first capacitive node, and a lower-conversion-gain readout signal on the column output line, while the transfer-gate control line is driven to the state that enables photocharge conduction via the transfer gate, by driving the conversion-gain-select line to a second state that renders the conversion-gain transistor in a conducting state to electrically couple the second capacitive node from the first capacitive node. 32 . The integrated-circuit image sensor of claim 31 wherein the conversion-gain-select line extends in the row-wise direction across the pixel array. 33 . The integrated-circuit image sensor of claim 31 wherein the conversion-gain-select line extends in the column-wise direction across the pixel array. 34 . The integrated-circuit image sensor of claim 31 wherein the control circuitry to drive the transfer-gate control line to the state that enables photocharge conduction via the transfer gate while driving the conversion-gain-select line to the first state and to drive the conversion-gain-select line to the second state while the transfer-gate control line is driven to the state that enables photocharge conduction via the transfer gate comprises circuitry to drive the transfer-gate control line to the state that enables photocharge conduction via the transfer gate throughout an interval in which the conversion-gain-select line is driven to both the first and second states. 35 . The integrated-circuit image sensor of claim 31 wherein the control circuitry to drive the transfer-gate control line to the state that enables photocharge conduction via the transfer gate while driving the conversion-gain-select line to the first state and to drive the conversion-gain-select line to the second state while the transfer-gate control line is driven to the state that enables photocharge conduction via the transfer gate comprises circuitry to generate a first transfer-enable pulse on the transfer-gate control line while the conversion-gain-select line is driven to the first s
with different integration times · CPC title
for reducing electromagnetic interference, e.g. clocking noise · CPC title
Addressed sensors, e.g. MOS or CMOS sensors · CPC title
Electricity · mapped topic
Electricity · mapped topic
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