System and method for dynamic allocation to a host of memory device controller memory resources

Patent metadata

Field	Value
Publication number	US-2020004445-A1
Application number	US-201816023767-A
Country	US
Kind code	A1
Filing date	Jun 29, 2018
Priority date	Jun 29, 2018
Publication date	Jan 2, 2020
Grant date	—

Abstract

Systems and methods for a non-volatile memory (NVM) system to allocate controller memory buffer resources to multiple host functions based on host input are disclosed. The NVM system may include a NVM controller configured to advertise total available controller buffer resources to a host. The NVM system includes host writable controller buffer allocation registers for receiving host selected amounts of available controller buffer resources, where a physical function on the host selects a portion of the buffer resources for itself and also selects portions of NVM system controller buffer resources for each other of the secondary, or virtual, host functions also in communication with the NVM system. In this manner, a host in a non-volatile memory express (NVMe) system may dynamically designate controller buffer resources for itself and all other hosts of the NVM system rather than relying on a static NVM system default distribution of controller buffer resources.

First claim

1 . A method for a memory device to dynamically configure an amount of controller memory resources located on the memory device, the method comprising the memory device:
detecting a memory device initialization trigger; in response to detecting the memory device initialization trigger, communicating to a physical function of a virtualized host a total amount of controller memory resources on the memory device that are available for use by the physical function and any virtual functions in communication with the memory device; receiving, from the physical function, a controller memory resources configuration setting identifying both a first portion of the controller memory resources located on the memory device to be reserved for the physical function and a second portion of the controller memory resources located on the memory device to be reserved for a virtual function; storing the received controller memory resources configuration setting on the memory device identifying the first portion and the second portion; and accessing the first portion in response to received commands identifying the physical function, and accessing the second portion in response to received commands identifying the virtual function, in accordance with the received controller memory resources configuration setting.

2 . The method of claim 1 , wherein the controller memory resources located on the memory device comprise a non-volatile memory express (NVMe) controller memory buffer (CMB).

3 . The method of claim 2 , wherein the memory device communicates the total amount of controller memory resources on the memory device that are available for use by all functions of the virtualized host by updating a physical function register on the memory device with an amount of CMB space available for all functions of the virtualized host in communication with the memory device.

4 . The method of claim 3 , wherein:
the memory device further comprises a physical function CMB configuration register and a virtual function CMB configuration register; and storing the controller memory resources configuration setting comprises the memory device:
storing the first portion of the controller memory resources located on the memory device to be reserved for the physical function in the primary function CMB configuration register; and
storing the second portion of the controller memory resources located on the memory device to be reserved for the virtual function in the virtual function CMB configuration register.

5 . The method of claim 2 , wherein the controller memory resources located on the memory device further comprise a non-volatile memory express (NVMe) persistent memory region (PMR).

6 . The method of claim 5 , wherein the memory device communicates the total amount of controller memory resources on the memory device that are available for use by the physical function and any virtual functions by:
updating a physical function CMB register on the memory device with an amount of CMB space available for all primary and virtual functions in communication with the memory device; and updating a physical function PMR register on the memory device with an amount of PMR space available for all primary and virtual functions in communication with the memory device.

7 . The method of claim 6 , wherein:
the memory device further comprises a physical function CMB configuration register, a physical function PMR configuration register, a virtual function CMB configuration register, and a virtual function PMR configuration register; the first portion of the controller memory resources comprises a first amount of CMB space and a first amount of PMR space; the second portion of the controller memory resources comprises a second amount of CMB space and a second amount of PMR space; and storing the controller memory resources configuration setting comprises the memory device:
storing the first amount of CMB space in the physical function CMB configuration register;
storing the first amount of PMR space in the physical function PMR configuration register;
storing the second amount of CMB space in the virtual function CMB configuration register; and
storing the second amount of PMR space in the virtual function PMR configuration register.

8 . The method of claim 7 , wherein storing the controller memory resources configuration setting comprises storing the controller memory resources configuration setting in a volatile memory of a controller of the memory device.

9 . A non-volatile memory device comprising:
a non-volatile memory having a plurality of memory cells; a communication interface configured to communicate with a host device; and a controller in communication with the non-volatile memory and the communication interface, the controller configured to:
during an initialization phase of the non-volatile memory device:
advertise to the host device a total amount of available controller memory resources on the non-volatile memory device that are available for use by the host device; and
store a controller memory resources configuration setting received from the host device, based on the total amount of available controller memory resources, identifying a host device determined portion of the total amount of available controller memory resources that the host device reserves for host device use.

10 . The non-volatile memory device of claim 9 , wherein:
the host device comprises a virtualized host device having a physical function and at least one virtual function; and the controller memory resources configuration setting comprises both a first portion of the controller memory resources located on the memory device to be reserved for the physical function and a second portion of the controller memory resources located on the memory device to be reserved for the at least one virtual function.

11 . The non-volatile memory device of claim 9 ,
wherein the host device comprises a virtualized host device having a physical function and at least one virtual function; and further comprising a plurality of host writeable controller memory resource size registers, each of the plurality of host writeable controller memory resource size registers configured to store a controller memory resources configuration setting from the host device relating to a portion of the total amount of the available controller memory resources selected by the host device for a respective one of the physical function and the at least one virtual function.

12 . The non-volatile memory device of claim 11 , wherein the available controller memory resources comprise controller volatile memory.

13 . The non-volatile memory device of claim 12 , wherein the controller volatile memory comprises contiguous controller volatile memory.

14 . The non-volatile memory device of claim 11 , wherein the available controller memory resources comprise a non-volatile memory express (NVMe) controller memory buffer (CMB) and an NVMe persistent memory region (PMR).

15 . The non-volatile memory device of claim 14 , wherein the plurality of host writeable controller memory resource size registers comprise:
a first set of host writeable controller memory resource size registers for storing a host determined portion of CMB resources for each of the physical function and each virtual function of the at least one virtual function; and a second set of host writeable controller memory resource size registers for storing a host determined portion of PMR resources for each of the physical function and each virtual function of the at least one virtual function.

16 .

Assignees

• Western Digital Tech Inc

Inventors

• Benisty Shay

Classifications

• G06F9/5077

  Logical partitioning of resources; Management or configuration of virtualized resources (specific details on emulation or internal functioning of virtual machines G06F9/455) · CPC title

• G06F3/0679 Primary

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F3/0664

  at device level, e.g. emulation of a storage device or system · CPC title

• G06F3/0631 Primary

  by allocating resources to storage systems · CPC title

• G06F3/0656

  Data buffering arrangements · CPC title