High yield substrate assembly

Patent metadata

Field	Value
Publication number	US-2019341361-A1
Application number	US-201916514104-A
Country	US
Kind code	A1
Filing date	Jul 17, 2019
Priority date	Nov 18, 2011
Publication date	Nov 7, 2019
Grant date	—

Abstract

High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.

First claim

What is claimed is:

1 . A method of forming a reusable substrate assembly configured for formation of integrated circuit devices, comprising:
bonding a plurality of substrates to one another at edges of the plurality of substrates; forming crystalline layers on the plurality of substrates; and forming trenches in the substrates that define border regions of the crystalline layers that are formed on the plurality of substrates; wherein said reusable substrate assembly is configured for use with integrated circuit manufacturing equipment designed to process wafers larger than individual instances of the plurality of substrates, wherein bonds between the plurality of substrates are operable to relieve thermal stress across the reusable substrate assembly during integrated circuit processing manufacturing, and wherein said reusable substrate assembly is in contact with bottoms of the plurality of substrates and is configured to be removed from said plurality of substrates.

2 . The method of forming a reusable substrate assembly of claim 1 , wherein the reusable substrate assembly has a width or diameter of 200 mm to 300 mm.

3 . The method of forming a reusable substrate assembly of claim 1 , wherein instances of the plurality of substrates have a generally rectangular shape.

4 . The method of forming a reusable substrate assembly of claim 1 , wherein instances of the plurality of substrates have a generally non-rectangular shape.

5 . The method of forming a reusable substrate assembly of claim 1 , wherein the plurality of substrates are bonded with nanoparticles between the substrates.

6 . The method of forming a reusable substrate assembly of claim 1 , wherein the plurality of substrates are bonded with alumina between the substrates.

7 . The method of forming a reusable substrate assembly of claim 12 , wherein at least one edge of one substrate of said plurality of substrates is not perpendicular to a face of said one substrate.

8 . The method of forming a reusable substrate assembly of claim 7 , wherein said at least one edge enhances bonding of said one substrate in comparison to an edge that is perpendicular to a said face of said one substrate.

9 . The method of forming a reusable substrate assembly of claim 1 , wherein said plurality of substrates are from the set of substrates comprising sapphire, Gallium Nitride (GaN), Gallium Arsenide (GaAs), Gallium Phosphide (GaP), Lithium Tantalate (LiTaO 3 ), Lithium Niobate (LiNbO 3 ), Indium Arsenide (InAs), Indium Phosphide (InP), Silicon Carbide (SiC), and Germanium (Ge).

10 . The method of forming a reusable substrate assembly of claim 1 , wherein said plurality of substrates said plurality of substrates interrupt a crystal structure of a surface.

11 . The method of forming a reusable substrate assembly of claim 1 , wherein said plurality of substrates are characterized as amorphous.

12 . The method of forming a reusable substrate assembly of claim 1 , wherein said plurality of substrates are aligned in a rectilinear pattern on a surface.

13 . The method of forming a reusable substrate assembly of claim 1 , wherein regions bounded by said plurality of substrates comprise polygonal regions.

14 . The method of forming a reusable substrate assembly of claim 1 , wherein said plurality of substrates are configured to allow formation of a plurality of integrated circuit devices there between.

15 . The method of forming a reusable substrate assembly of claim 1 , wherein said plurality of substrates are not substantially Silicon.

Assignees

• Invensas Corp

Inventors

• Wang Liang
• Mohammed Ilyas
• Beroz Masud

Classifications

• H10P90/00

  Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement · CPC title

• H10P90/18

  by shaping · CPC title

• H10P72/74 Primary

  using temporarily an auxiliary support · CPC title

• H10P14/2918

  being semiconductor metal oxides (Group IIB-VIA materials H10P14/2913) · CPC title

• H10P14/2911

  Arsenides · CPC title