Electronic device comprising an insulating trench and method for the production of same

Patent metadata

Field	Value
Publication number	US-2019333802-A1
Application number	US-201716468575-A
Country	US
Kind code	A1
Filing date	Dec 6, 2017
Priority date	Dec 12, 2016
Publication date	Oct 31, 2019
Grant date	—

Abstract

An electronic device including a semiconductor substrate having first and second opposite surfaces and including an electrical insulation trench extending in the substrate from the first surface to the second surface, the electrical insulation trench including lateral walls, an electrically-insulating layer covering the lateral walls, and a core made of a filling material separated from the substrate by the insulating layer and including an electrically-insulating portion extending in the substrate from the first surface and covering the core.

First claim

1 . An electronic device comprising a semiconductor substrate having first and second opposite surfaces and comprising an electrical insulation trench extending in the substrate from the first surface to the second surface, the electrical insulation trench comprising lateral walls, an electrically-insulating layer covering the lateral walls, and a core made of a filling material separated from the substrate by the insulating layer and comprising an electrically-insulating portion extending in the substrate from the first surface and covering the core.

2 . The electronic device of claim 1 , wherein the first surface is planar at the location of the electrical insulation trench.

3 . The electronic device of claim 1 , wherein the insulating portion is a thermal oxide.

4 . The electronic device of claim 1 , wherein the insulating portion is made of silicon oxide.

5 . The electronic device of claim 1 , wherein the filling material is polysilicon.

6 . The electronic device of claim 1 , wherein the electrically-insulating portion extends laterally in the substrate with respect to the rest of the electrical insulation trench.

7 . The electronic device of claim 1 , comprising at least first and second optoelectronic components capable of emitting an electromagnetic radiation or of absorbing an electromagnetic radiation, the first optoelectronic component resting on a first portion of the substrate and the second optoelectronic component resting on a second portion of the substrate, the electrical insulation trench separating the first portion from the second portion.

8 . A method of manufacturing the electronic device of claim 1 , comprising the steps of:
(a) forming a first opening into the substrate from the first surface; (b) forming a layer of the material of the electrically-insulating layer in the first opening and on the first surface; (c) forming a layer of the filling material in the opening and on the first surface; and (d) forming the insulating portion.

9 . The method of claim 8 , wherein step (d) comprises a thermal oxidation step.

10 . The method of claim 8 , wherein step (d) comprises a step of chemical vapor deposition followed by a step of thermal anneal at more than 500° C.

11 . The method of claim 8 , further comprising step (e) of etching portions of the layer of the material of the electrically-insulating layer and of the layer of the filling material present on the first surface.

12 . The method of claim 11 , wherein step (e) is carried out before step (d).

13 . The method of claim 11 , wherein step (d) is carried out before step (e).

14 . The method of claim 13 , further comprising forming, before step (d), a second opening into the layer of the material of the electrically-insulating layer, the layer of the filling material on the first surface and the substrate at the location of the insulating portion.

Assignees

• Aledia

Inventors

• Lacave Thomas
• Gilet Philippe

Classifications

• H10W10/0142

  the dielectric materials being chemical transformed from non-dielectric materials · CPC title

• H10W10/041

  of isolation regions comprising polycrystalline semiconductor materials · CPC title

• H10W10/40

  Isolation regions comprising polycrystalline semiconductor materials · CPC title

• H10W10/011

  of isolation regions comprising dielectric materials · CPC title

• H10W10/10

  Isolation regions comprising dielectric materials · CPC title