Phase-domain detection apparatus for mit application and method thereof

Patent metadata

Field	Value
Publication number	US-2019324100-A1
Application number	US-201916390344-A
Country	US
Kind code	A1
Filing date	Apr 22, 2019
Priority date	Apr 24, 2018
Publication date	Oct 24, 2019
Grant date	—

Abstract

There is provided a phase-domain detection apparatus for MIT application. The phase-domain detection apparatus includes a phase-locked loop unit configured to generate a plurality of reference clock signals having different phases and a phase-domain detection unit. The phase-domain detection unit is configured to receive the reference clock signals from the phase-locked loop unit, receive a response clock signal that is a phase-shifted reference clock signal of a reference clock signal inputted and passed through to a target object among the reference clock signals, and detect a phase difference between the reference clock signal inputted to the target object and the response clock signal.

First claim

What is claimed is:

1 . A phase-domain detection apparatus for MIT application, comprising:
a phase-locked loop unit configured to generate a plurality of reference clock signals having different phases; and a phase-domain detection unit configured to receive the reference clock signals from the phase-locked loop unit, receive a response clock signal that is a phase-shifted reference clock signal of a reference clock signal inputted to and passed through a target object among the reference clock signals, and detect a phase difference between the reference clock signal inputted to the target object and the response clock signal.

2 . The phase-domain detection apparatus for MIT application of claim 1 , wherein the phase-domain detection unit includes:
a clock signal selection unit configured to select two or more reference clock signals among the reference clock signals; a phase selection unit configured to select and output one of the two or more reference clock signals whose phase is closer to a phase of the response clock signal; a mixing unit configured to modulate the selected one reference clock signal by the phase selection unit with the response clock signal; and a sigma-delta loop configured to generate bit stream data including information on the phase difference between the selected one reference clock signal and the response clock signal based on the modulated signal outputted from the mixing unit.

3 . The phase-domain detection apparatus for MIT application of claim 2 , wherein the clock signal selection unit selects a first reference clock signal and a second reference clock signal having different phases, and the sigma-delta loop generates the bit stream data by quantizing phase information between the first reference clock signal and the second reference clock signal by using the modulated signal outputted from the mixing unit.

4 . The phase-domain detection apparatus for MIT application of claim 3 , wherein the sigma-delta loop includes:
a comparator configured to compare a DC term of the modulated signal with a preset threshold voltage to invert a logic of the DC term when the DC term is greater than or smaller than the preset threshold value; and an integrator configured to filter out a high frequency term of the modulated signal and quantize the phase information between the first reference clock signal and the second reference clock signal selected by the clock signal selection unit by using the modulated signal.

5 . The phase-domain detection apparatus for MIT application of claim 3 , wherein the bit stream data generated by the sigma loop filter is fed back to the phase selection unit, and
wherein the phase selection unit alternately selects one of the first reference clock signal and the second reference clock signal whose phase is closer to the phase of the response clock signal based on the bit stream data and outputs the selected one reference clock signal to the mixing unit.

6 . A phase-domain detection method for MIT application, comprising:
generating a plurality of reference clock signals having different phases; inputting one of the reference clock signals to a target object; receiving a response clock signal that is a phase-shifted reference clock signal of a reference clock signal inputted to and passed through a target object among the reference clock signals; and detecting a phase difference between the reference clock signal inputted to the target object and the response clock signal.

7 . The phase-domain detection method for MIT application of claim 6 , wherein said detecting the phase difference includes:
selecting a first reference clock signal and a second reference clock signal having different phases among the reference clock signals; selecting one of the first and the second reference clock signal whose phase is closer to a phase of the response clock signal; modulating the selected one reference clock signal with the response clock signal; and generating bit stream data including information on the phase difference between the selected one reference clock signal and the response clock signal based on the modulated signal.

8 . The phase-domain detection method for MIT application of claim 7 , wherein said selecting one of the first and the second reference clock signal includes:
feeding back the bit stream data; and alternately selecting one of the first and the second reference clock signals whose phase is closer to the phase of the response clock signal based on the bit stream data.

Assignees

• Ulsan National Institute Of Science And Tech

Inventors

• Kim Jae Joon
• Park Chansham

Classifications

• A61B5/0522 Primary

  Magnetic induction tomography · CPC title

• G01R33/32 Primary

  Excitation or detection systems, e.g. using radio frequency signals · CPC title

• G01R33/4812

  MR combined with X-ray or computed tomography [CT] · CPC title

• A61B5/0093

  Detecting, measuring or recording by applying one single type of energy and measuring its conversion into another type of energy · CPC title

• H03L7/1976

  using a phase accumulator for controlling the counter or frequency divider · CPC title