Sampling circuit, equalization circuit, and system for single cell in series battery pack

Patent metadata

Field	Value
Publication number	US-2019317153-A1
Application number	US-201916455714-A
Country	US
Kind code	A1
Filing date	Jun 27, 2019
Priority date	Dec 31, 2016
Publication date	Oct 17, 2019
Grant date	—

Abstract

A sampling circuit, an equalization circuit, and a system for a single cell in a series battery pack are provided. In the sampling circuit provided in this disclosure, the single cell is isolated from a voltage divider resistor in the bleeder circuit by using the first isolation sampling switch, so as to prevent a drain current of the single cell. In addition, sampling errors in sampling voltages collected by the sampling circuit may be offset during differential calculation.

First claim

What is claimed is:

1 . A sampling circuit for a single cell in a series battery pack, comprising: a controller, an analog-to-digital converter (ADC), a bleeder circuit, a battery pack including n single cells connected in series, and n isolation sampling switches, wherein
one end of each of the n isolation sampling switches is connected to a first input end of the bleeder circuit, the other ends of the n isolation sampling switches are respectively connected to positive electrodes of the n single cells, and the isolation sampling switches are in a one-to-one correspondence with the single cells; a negative electrode of a first single cell in the n single cells is connected to a second input end of the bleeder circuit, and is grounded; an output end of the bleeder circuit is connected to a second input end of the ADC, a first input end of the ADC is grounded, and an output end of the ADC is connected to an input end of the controller; a first output group of the controller is separately connected to control ends of the n isolation sampling switches to control the n isolation sampling switches to be open or closed; and the controller sequentially controls the n isolation sampling switches to be closed, and sends voltages to earth of the positive electrodes of the n single cells corresponding to the n isolation sampling switches to the ADC for conversion after the voltages to earth are attenuated by the bleeder circuit, the ADC transmits converted sampling voltage values to the controller, and the controller subtracts two adjacent sampling voltage values to obtain a voltage value of a corresponding single cell.

2 . The sampling circuit according to claim 1 , wherein the bleeder circuit comprises a first voltage divider resistor and a second voltage divider resistor;
one end of the first voltage divider resistor is connected to the n isolation sampling switches, and the other end is connected to the second input end of the ADC; and one end of the second voltage divider resistor is connected to the negative electrode of the first single cell in the n single cells, and the other end is connected to the second input end of the ADC.

3 . The sampling circuit according to claim 1 , further comprising an auxiliary driving power supply, wherein
any one of the n isolation sampling switches comprises a first transistor, a second transistor, and an opto-isolator; a first port of the first transistor is connected to a first port of the second transistor, a second port of the first transistor is connected to a first port of the opto-isolator, and a third port of the first transistor is connected to a positive electrode of a single cell corresponding to the first transistor; a second port of the second transistor is connected to the first port of the opto-isolator, and a third port of the second transistor is connected to the first input end of the bleeder circuit; a second port of the opto-isolator and the controller are common-grounded, a third port of the opto-isolator is connected to the first output group of the controller, and a fourth port of the opto-isolator is connected to a positive electrode of the auxiliary driving power supply; and a negative electrode of the auxiliary driving power supply is connected to the first input end of the bleeder circuit.

4 . The sampling circuit according to claim 3 , wherein the first transistor and the second transistor are N-channel metal oxide semiconductors.

5 . The sampling circuit according to claim 1 , wherein any one of the n isolation sampling switches comprises a third transistor, a fourth transistor, and an opto-isolator;
a first port of the third transistor is connected to a first port of the fourth transistor, a second port of the third transistor is connected to a fourth port of the opto-isolator, and a third port of the third transistor is connected to a positive electrode of a single cell corresponding to the third transistor; a second port of the fourth transistor is connected to the fourth port of the opto-isolator, and a third port of the fourth transistor is connected to the first input end of the bleeder circuit; and a first port of the opto-isolator is connected to a negative electrode of a single cell corresponding to the opto-isolator, a second port of the opto-isolator and the controller are common-grounded, and a third port of the opto-isolator is connected to the first output group of the controller.

6 . The sampling circuit according to claim 5 , wherein the third transistor and the fourth transistor are P-channel metal oxide semiconductors.

7 . A sampling circuit for a single cell in a series battery pack, comprising: a controller, an analog-to-digital converter (ADC) with communication isolation, a battery pack including n single cells connected in series, n first isolation sampling switches, and n second isolation sampling switches, wherein
one end of each of the n first isolation sampling switches is connected to a first input end of the ADC with communication isolation, the other ends of the n first isolation sampling switches are respectively connected to positive electrodes of the n single cells, and the first isolation sampling switches are in a one-to-one correspondence with the single cells; one end of each of the n second isolation sampling switches is connected to a second input end of the ADC with communication isolation, the other ends of the n second isolation sampling switches are respectively connected to negative electrodes of the n single cells, and the second isolation sampling switches are in a one-to-one correspondence with the single cells; an output end of the ADC with communication isolation is connected to an input end of the controller; a first output group of the controller is separately connected to control ends of the n first isolation sampling switches and control ends of the n second isolation sampling switches to control the n isolation sampling switches to be open or closed; and the controller sequentially controls closure of the first isolation sampling switches and the second isolation sampling switches that are connected to all the single cells, and may sequentially send voltages of all the single cells to the ADC with communication isolation for conversion, and sampling voltage values of all the single cells that are converted by the ADC are isolated and transmitted to the controller.

8 . The sampling circuit according to claim 7 , further comprising an auxiliary driving power supply, wherein
any one of the n first isolation sampling switches and the n second isolation sampling switches comprises a first transistor, a second transistor, and an opto-isolator; a first port of the first transistor is connected to a first port of the second transistor, a second port of the first transistor is connected to a first port of the opto-isolator, and a third port of the first transistor is connected to a positive electrode of a single cell corresponding to the first transistor; a second port of the second transistor is connected to the first port of the opto-isolator, and a third port of the second transistor is connected to a first input end of a bleeder circuit; a second port of the opto-isolator and the controller are common-grounded, a third port of the opto-isolator is connected to the first output group of the controller, and a fourth port of the opto-isolator is connected to a positive electrode of the auxiliary driving power supply; and a negative electrode of the auxiliary driving power supply is connected to the second input end of the ADC.

9 . The sampling circuit according to claim 8 , wherein the first transistor and the second transistor are N-channel metal oxide semiconductors.

10 .

Assignees

• Huawei Tech Co Ltd

Inventors

• Pan Denghai
• Lv Zejie
• Wu Yuanzhong

Classifications

• H02J7/56

  Active balancing, e.g. using capacitor-based, inductor-based or DC-DC converters · CPC title

• H02J7/52 Primary

  for charge balancing, e.g. equalisation of charge between batteries · CPC title

• B60L58/22

  Balancing the charge of battery modules · CPC title

• H01M10/482

  for several batteries or cells simultaneously or sequentially · CPC title

• H01M2010/4271

  Battery management systems including electronic circuits, e.g. control of current or voltage to keep battery in healthy state, cell balancing · CPC title