Two-Dimensioanl Zero Padding in a Stream of Matrix Elements

Patent metadata

Field	Value
Publication number	US-2019278596-A1
Application number	US-201916420457-A
Country	US
Kind code	A1
Filing date	May 23, 2019
Priority date	Jul 15, 2013
Publication date	Sep 12, 2019
Grant date	—

Abstract

Software instructions are executed on a processor within a computer system to configure a steaming engine with stream parameters to define a multidimensional array. The stream parameters define a size for each dimension of the multidimensional array and a specified width for two selected dimensions of the array. Data is fetched from a memory coupled to the streaming engine responsive to the stream parameters. A stream of vectors is formed for the multidimensional array responsive to the stream parameters from the data fetched from memory. When either selected dimension in the stream of vectors exceeds a respective specified width, the streaming engine inserts null elements into each portion of a respective vector for the selected dimension that exceeds the specified width in the stream of vectors. Stream vectors that are completely null are formed by the streaming engine without accessing the system memory for respective data.

First claim

1 . A method of operating a streaming engine in a computer system, the method comprising:
receiving stream parameters into control logic of the streaming engine to define a multidimensional array, wherein the stream parameters the stream parameters define a size for each dimension of the multidimensional array, a first specified width for a first selected dimension of the array, and a second specified width for a second selected dimension of the array; fetching data from a memory coupled to the streaming engine responsive to the stream parameters; forming a stream of vectors for the array responsive to the stream parameters from the data fetched from memory; determining when the first selected dimension in the stream of vectors exceeds the first specified width and inserting null elements in a portion of a respective vector for the first selected dimension in the stream of vectors that exceeds the first specified width; and determining when the second selected dimension in the stream of vectors exceeds the second specified width and inserting null elements in a portion of a respective vector for the second selected dimension in the stream of vectors that exceeds the second specified width.

2 . The method of claim 1 , further comprising suppressing an access to the memory responsive to the stream parameters while the first selected dimension exceeds the first specified width.

3 . The method of claim 2 , further comprising forming a null stream vector without fetching respective data from the memory for a portion of the first selected dimension that exceeds the first specified width in the stream of vectors.

4 . The method of claim 3 , further comprising forming a null stream vector without fetching respective data from the memory for a portion of the second selected dimension that exceeds the second specified width in the stream of vectors.

5 . The method of claim 4 , further comprising suppressing access to an address lookaside buffer while the second selected dimension exceeds the second specified width.

6 . The method of claim 1 , in which the stream parameters include an element size of the array, a number of elements to include in each vector of a stream, and a number of vectors to include in the stream for each dimension of the array.

7 . The method of claim 1 , in which null elements are set to a value of zero.

8 . The method of claim 3 , in which all elements in a null stream vector have a value of zero.

9 . The method of claim 1 , in which the null value is specified by the stream parameters.

10 . A system comprising:
a system memory; a streaming engine coupled to the system memory, wherein the streaming engine comprises: a stream template register to hold stream parameters, wherein the stream parameters define a size for each dimension of a multidimensional array, a first specified width for a first selected dimension of the array, and a second specified width for a second selected dimension of the array; address generation logic coupled to the stream template register; a register file with inputs coupled to receive a vector fetched from the system memory; an alignment network with inputs coupled to outputs of the register file, the alignment network having outputs coupled to outputs of the streaming engine to provide stream vectors responsive to the stream parameters; and control logic coupled to control the alignment network to cause the alignment network to insert null elements into a portion of a stream vector when the first selected dimension exceeds the first specified width and when the second selected dimension of the multidimensional array exceeds the second specified width.

11 . The system of claim 10 , wherein the control logic is operable to suppress an access to the system memory responsive to the stream parameters either while a portion of the first selected dimension exceeds the first specified width and while a portion of the second selected dimension exceeds the second specified width.

12 . The system of claim 11 , wherein the control logic is operable to cause the alignment network to form a null stream vector without fetching a respective vector from the system memory for the portion of the first selected dimension that exceeds the first specified width and for the portion of the second selected dimension that exceeds the second specified width.

13 . The system of claim 11 , further comprising a translation lookaside buffer coupled to the address generation logic, wherein the control logic is operable to suppress an access to the translation lookaside buffer by the address generation logic while a portion of the first selected dimension exceeds the first specified width and while a portion of the second selected dimension exceeds the second specified width.

14 . The system of claim 10 , in which the null elements have a value of zero.

15 . The system of claim 10 in which the null value is specified by the stream parameters.

16 . The system of claim 10 being a system on a chip (SoC), further comprising a processing unit coupled to the outputs of the streaming engine to receive the stream vectors.

17 . A system comprising:
a system memory; a streaming engine coupled to access the system memory to form a stream of stream vectors for a multidimensional array, wherein the streaming engine is operable to insert null elements into selected stream vectors of two dimensions of the multidimensional array; and a processing unit coupled to outputs of the streaming engine to receive the stream of stream vectors.

18 . The system of claim 17 , in which the streaming engine comprises:
a stream template register to hold stream parameters, wherein the stream parameters define a size for each dimension of the multidimensional array, a first specified width for a first selected dimension of the array, and a second specified width for a second selected dimension of the array; and control logic coupled to receive the stream parameters from the stream template being operable to insert null elements into a portion of a stream vector when the first selected dimension exceeds the first specified width and when the second selected dimension of the multidimensional array exceeds the second specified width.

19 . The system of claim 18 , wherein the control logic is operable to suppress an access to the system memory responsive to the stream parameters while a portion of the first selected dimension exceeds the first specified width and while a portion of the second selected dimension exceeds the second specified width.

20 . The system of claim 18 , wherein the control logic is operable to form a null stream vector without fetching a respective vector from the system memory while a portion of the first selected dimension exceeds the first specified width and while a portion of the second selected dimension exceeds the second specified width.

Assignees

• Texas Instruments Inc

Inventors

• Leven William Franklin
• Bhardwaj Asheesh
• Tran Son Hung
• Anderson Timothy David

Classifications

• G06F9/30145

  Instruction analysis, e.g. decoding, instruction word fields · CPC title

• G06F12/0897

  with two or more cache hierarchy levels (with multilevel cache hierarchies G06F12/0811) · CPC title

• G06F9/30014

  with variable precision · CPC title

• G06F9/3802

  Instruction prefetching · CPC title

• G06F12/0875

  with dedicated cache, e.g. instruction or stack · CPC title