Scalable platform for system level testing

Patent metadata

Field	Value
Publication number	US-2019277907-A1
Application number	US-201815913673-A
Country	US
Kind code	A1
Filing date	Mar 6, 2018
Priority date	Mar 6, 2018
Publication date	Sep 12, 2019
Grant date	—

Abstract

A scalable test platform can include one or more of a plurality of different device interface boards and a plurality of primitives. The different device interface boards can be configured to provide a uniform interface to couple different types of DUTs and or DUTs with different form factors to the plurality of primitives. The plurality of primitives can be configured to distribute power to the DUTs, and to perform system level testing of the respective DUTs. The plurality of primitives can be configurable by a user to perform any number of system level tests on a number of different types of DUTs and or DUTs with different form factors.

First claim

What is claimed is:

1 . A test platform comprising:
a plurality of device interface boards (DIBs); a plurality of primitives configured to distribute power to devices under test (DUTs) coupled to device interface boards (DIBs) and to perform user configurable system level testing of the devices under test (DUTs) coupled to the device interface board (DIBs); one or more primitive racks configured to modularly house the plurality of primitives; a host controller configured to install, configure and manage performance of the user configurable system level testing on the plurality of primitives; a backplane configured to couple the host controller to the plurality of primitives and to couple power to the plurality of primitives;

2 . The test platform of claim 1 , wherein the primitives include:
one or more slice modules configured to perform the user configurable system level functional testing of the devices under test (DUTs) coupled to the device interface boards (DIBs); one or more power supply components configured to control the distribution of power to the devices under test (DUTs) coupled to device interface boards (DIBs); a load board configured to couple the plurality of device interface boards (DIBs) to one or more site modules and the one or more power supply components; and a back plane interface configured to couple the one or more site modules and the one or more power supply components to the back plane.

3 . The test system of claim 1 , wherein the modular primitives are configured to independent control testing of the devices under test (DUTs) coupled by the device interface board (DIBs) to the modular primitive.

4 . The test system of claim 1 , wherein the host control is further configured to coordinate operation of the plurality of modular primitives.

5 . The test system of claim 1 , wherein the modular primitives are self-contained.

6 . The test system of claim 1 , wherein the back plane is further configured to communicatively couple the number of primitives together.

7 . The test system of claim 1 , wherein the primitives comprise Field Programmable Gate Array (FPGA) based test electronics configured to perform user defined system level testing of the devices under test (DUTs) coupled to the device interface board (DIBs).

8 . The test system of claim 1 , wherein the primitives are configured by software executing on the host controller.

9 . The test system of claim 1 , wherein test flow and control of the user configurable system level function testing of the devices under test (DUTs) is controlled by the primitives.

10 . The test system of claim 1 , wherein characterization of the devices under tests (DUTs) in response to the system level testing is performed by the primitive.

11 . The test system of claim 1 , wherein power profiling of the devices under tests (DUTs) in response to the system level function testing is performed by the primitive.

12 . The test system of claim 1 , wherein calibration and diagnostics of the plurality of primitives is performed by control software executing on the host controller.

13 . The test system of claim 1 , wherein environmental conditions of the devices under test (DUTs) during system level testing is controlled by the primitives.

14 . The test system of claim 1 , further comprising modularized automation equipment.

15 . The test system of claim 14 , wherein the modularized automation equipment includes one or more robotic DUT handlers.

16 . The test system of claim 14 , wherein the modularized automation equipment includes one or more device under test (DUT) racks.

17 . The test system of claim 1 , wherein the user configurable system level testing comprises research and development cycle testing.

18 . The test system of claim 17 , wherein the research and development cycle testing includes one or more of design verification testing and reliability demonstration testing.

19 . The test system of claim 1 , wherein the user configurable system level testing comprises production cycle testing.

20 . The test system of claim 19 , wherein the production cycle testing includes one or more of built-in self-testing and full-speed functional testing.

21 . The test system of claim 1 , wherein the user configurable system level testing includes fault detection and fault location.

22 . The test system of claim 1 , wherein control software executing on the host controller provides a universal graphics user interface for the number of primitives for testing of the devices under test (DUTs) coupled to the device interface board (DIBs).

23 . The test system of claim 2 , wherein the slice module is configured to communicate information to the host controller via a standard communication protocol and standard modular removable communication connector.

24 . The test system of claim 2 , wherein the power supply component is configured to receive power from a standard utility outlet, convert the standard utility power into device under test power levels, and control delivery of power to the device under test.

25 . The test system of claim 2 , wherein the slice module includes a field programmable gate array (FPGA) and the FPGA is reprogrammable for different test protocols by loading different configuration firmware bit files.

26 . The test system of claim 1 , wherein:
the device interface boards (DIBs) further includes one or more environmental components configured to control one or more environmental conditions of the devices under test (DUTs) coupled to the device interface board (DIBs); and the primitives further includes an environmental component controller configured to direct control of the environmental components of the device interface board.

27 . The test system of claim 1 , wherein the device interface boards (DIBs) further include an access interface configured to allow operator or robotic manipulation of the devices under test (DUTs).

28 . The test system of claim 1 , wherein the device interface boards (DIBs) and the primitives are configured to enable testing of one or more of the devices under test (DUTs) coupled to the device interface boards (DIBs) during the manipulation of one or more other devices under test (DUTs).

29 . The test system of claim 1 , wherein the device interface board (DIBs) includes one or more mechanically couplers for securing the devices under test (DUTs) of one or more types or form factors to the device interface boards (DIBs), and one or more electrical couplers for electrically coupling the devices under test (DUTs) of one or more types to the device interface boards (DIBs).

30 . The test system of claim 29 , wherein the device interface boards (DIBs) includes:
one or more slots, rails, hangers or bays of one or more types for coupling the plurality of devices under test (DUTs) of one or more form factor types or form factors to mechanically couple to the device interface boards (DIBs); and one or more connectors, sockets or plugs of one or more types for coupling to mating connectors, sockets or plugs on one or more types or form factors of devices under tests (DUTs) to couple signals and power between the device interface boards (DIBs) and the devices under tests (DUTs).

31 . A distributed testing platform comprising:
a plurality of user selec

Assignees

• Advantest Corp

Inventors

• Wolff Roland
• Su Mei-Mei
• Rogel-Favila Ben

Classifications

• G06F11/3688

  for test execution, e.g. scheduling of test suites · CPC title

• G01R31/31907

  Modular tester, e.g. controlling and coordinating instruments in a bus based architecture · CPC title

• G01R31/2868 Primary

  Complete testing stations; systems; procedures; software aspects · CPC title

• G01R1/0416

  Connectors, terminals (G01R1/0425 and G01R1/0433 take precedence; with measurement function for battery poles G01R31/364) · CPC title

• G01R31/2834 Primary

  Automated test systems [ATE]; using microprocessors or computers (G01R31/317 takes precedence; ATE for detection of defective computer hardware G06F11/2736) · CPC title