Cmos image sensor with pump gate and extremely high conversion gain

Patent metadata

Field	Value
Publication number	US-2019252428-A1
Application number	US-201916397841-A
Country	US
Kind code	A1
Filing date	Apr 29, 2019
Priority date	Apr 1, 2014
Publication date	Aug 15, 2019
Grant date	—

Abstract

Some embodiments relate to an image sensor pixel comprising a transfer gate formed on a first surface of a semiconductor substrate, a floating diffusion formed in the first surface of the semiconductor substrate, and a buried-well vertically pinned photodiode having a charge accumulation/storage region disposed substantially beneath the transfer gate. The transfer gate is spaced away from the floating diffusion such that an intervening semiconductor region provides a potential barrier to charge flow from beneath the transfer gate to the floating diffusion. The transfer gate is operable to control a vertical pump gate to selectively transfer charge from the charge accumulation/storage region to the floating diffusion by pumping charge from the buried charge accumulation/storage region underlying the transfer gate, over the potential barrier, and out to the floating diffusion, such that full charge transfer can be achieved without overlapping the edge of the transfer gate with the floating diffusion.

First claim

What is claimed is:

1 . An image sensor comprising a plurality of pixels, each pixel comprising:
a transfer gate formed on a first surface of a semiconductor substrate; a floating diffusion region formed in the first surface of the semiconductor substrate; and a buried-well vertically pinned photodiode having a charge accumulation/storage region disposed substantially beneath the transfer gate, wherein the transfer gate is spaced away from the floating diffusion region such that an intervening semiconductor region provides a potential barrier to charge flow from beneath the transfer gate to the floating diffusion, and wherein the transfer gate is operable to control a vertical pump gate to selectively transfer charge from the charge accumulation/storage region to the floating diffusion by pumping charge from the buried charge accumulation/storage region underlying the transfer gate, over the potential barrier that is between the transfer gate and the floating diffusion region, and out to the floating diffusion region, such that full charge transfer can be achieved without overlapping the edge of the transfer gate with the floating diffusion region.

2 . The image sensor according to claim 1 , wherein the vertical pump gate comprises a first semiconductor region disposed beneath the transfer gate and overlying the charge accumulation storage region, and a second semiconductor region disposed beneath the transfer gate and overlying the first semiconductor region and being laterally adjacent to the intervening semiconductor region, wherein the first semiconductor region provides a potential barrier that prevents charge from flowing back toward the charge accumulation/storage region during charge transfer from the second semiconductor region to the floating diffusion via the intervening semiconductor region.

3 . The image sensor according to claim 2 , wherein the first and second semiconductor regions, and the intervening semiconductor region all have the same doping type, with the first semiconductor region having a higher dopant concentration that the second semiconductor region, and the second semiconductor region having a higher dopant concentration than the intervening semiconductor region.

4 . An image sensor pixel architecture, comprising:
a floating diffusion; a pump gate that comprises a transfer gate and that is configured to control charge transfer from a charge accumulation/storage area of a buried-well vertical-pinned photodiode to the floating diffusion; and wherein the floating diffusion is separated from the edge of the gate dielectric of the transfer gate of the pump gate such that the floating diffusion does not overlap the edge of the gate dielectric of the transfer gate.

5 . A CMOS active pixel image sensor comprising an array of pixels, each pixel configured for selective intra-pixel charge transfer from a respective storage node that is primarily located under a transfer gate of the pixel, wherein the transfer gate is operable to transfer charge from the storage node to a floating diffusion according to a pump gate architecture.

6 . The CMOS active pixel image sensor according to claim 5 , wherein the floating gate and the transfer gate do not overlap such that overlap capacitance therebetween is negligible relative to the capacitance of the floating gate.

Assignees

• Dartmouth College

Inventors

• Ma Jiaju
• Fossum Eric R

Classifications

• H01L27/14621

  Electricity · mapped topic

• H01L27/14643

  Electricity · mapped topic

• H01L27/1464 Primary

  Electricity · mapped topic

• H01L27/14614

  Electricity · mapped topic

• H01L27/14627

  Electricity · mapped topic