Control buffer circuit and radio frequency switch for dual mode operation

US2019238127A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2019238127-A1
Application numberUS-201816106276-A
CountryUS
Kind codeA1
Filing dateAug 21, 2018
Priority dateJan 30, 2018
Publication dateAug 1, 2019
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A control buffer circuit includes a voltage detection circuit configured to detect whether a received voltage is a negative voltage or a ground voltage and provide a voltage detection signal based on a result of the detecting, and a buffer circuit configured to provide a switching signal based on the voltage detection signal, wherein the switching signal comprises a positive voltage as a switching-on level voltage and includes one or more of the ground voltage and the negative voltage as a switching-off level voltage.

First claim

Opening claim text (preview).

What is claimed is: 1 . A control buffer circuit comprising: a voltage detection circuit configured to detect whether a received voltage is a negative voltage or a ground voltage and provide a voltage detection signal based on a result of the detecting; and a buffer circuit configured to provide a switching signal based on the voltage detection signal, wherein the switching signal comprises a positive voltage as a switching-on level voltage and includes one of the ground voltage and the negative voltage as a switching-off level voltage. 2 . The control buffer circuit of claim 1 , wherein the buffer circuit is configured to generate the switching signal based on the voltage detection signal and a band selection signal. 3 . The control buffer circuit of claim 2 , wherein the voltage detection circuit is configured to provide the voltage detection signal with a first voltage when the received voltage is the negative voltage, and provide the voltage detection signal with a second voltage having a magnitude different from a magnitude of the first voltage when the received voltage is the ground voltage. 4 . The control buffer circuit of claim 3 , wherein the buffer circuit comprises a first buffer circuit configured to generate a first switching signal determined according to the voltage detection signal and a first band selection signal of the band selection signal. 5 . The control buffer circuit of claim 4 , wherein the first buffer circuit comprises: a negative voltage (VNEG) buffer configured to provide one of the positive voltage and the negative voltage as the switching level voltage of the switching signal based on the first band selection signal when the voltage detection signal is the first voltage, and a ground voltage (VSS) buffer configured to provide one of the positive voltage and the ground voltage as the switching level voltage of the switching signal based on the first band selection signal when the voltage detection signal is the second voltage. 6 . The control buffer circuit of claim 3 , wherein the buffer circuit comprises first to n-th buffer circuits configured to generate first to n-th switching signals that are determined based on the voltage detection signal and first to n-th band selection signals of the band selection signal. 7 . The control buffer circuit of claim 6 , wherein the first buffer circuit comprises: a VNEG buffer configured to provide one of the positive voltage and the negative voltage as the switching level voltage of the switching signal based on the first band selection signal when the voltage detection signal is the first voltage; and a VSS buffer configured to provide one of the positive voltage and the ground voltage as the switching level voltage of the switching signal based on the first band selection signal when the voltage detection signal is the second voltage. 8 . The control buffer circuit of claim 6 , wherein the n-th buffer circuit comprises: a VNEG buffer configured to provide one of the positive voltage and the negative voltage as the switching level voltage of the switching signal based on the n-th band selection signal when the voltage detection signal is the first voltage; and a VSS buffer configured to provide one of the positive voltage and the ground voltage as the switching level voltage of the switching signal based on the n-th band selection signal when the voltage detection signal is the second voltage. 9 . A radio frequency switch comprising: a control buffer circuit configured to generate a switching signal based on a band selection signal and a received voltage; and a switching circuit configured to switch at least one signal path in response to receiving the switching signal, wherein the control buffer circuit comprises: a voltage detection circuit configured to detect a voltage magnitude of the received voltage and provide a voltage detection signal; and a buffer circuit configured to provide a switching signal based on the received voltage detection signal. 10 . The radio frequency switch of claim 9 , wherein the buffer circuit is configured to provide the switching signal based on the received voltage detection signal and the band selection signal. 11 . The radio frequency switch of claim 10 , wherein the voltage detection circuit is configured to provide the voltage detection signal with a first voltage when the received voltage is the negative voltage, and provide the voltage detection signal with a second voltage having a magnitude different from a magnitude of the first voltage when the received voltage is the ground voltage. 12 . The radio frequency switch of claim 11 , wherein the buffer circuit comprises a first buffer circuit that generates a first switching signal determined based on the voltage detection signal and a first band selection signal of the band selection signal. 13 . The radio frequency switch of claim 12 , wherein the first buffer circuit comprises: a negative voltage (VNEG) buffer configured to provide one of the positive voltage and the negative voltage as the switching level voltage of the switching signal based on the first band selection signal when the voltage detection signal is the first voltage, and a ground voltage (VSS) buffer configured to provide one of the positive voltage and the ground voltage as the switching level voltage of the switching signal based on the first band selection signal when the voltage detection signal is the second voltage. 14 . The radio frequency switch of claim 11 , wherein the buffer circuit comprises first to n-th buffer circuits generating first to n-th switching signals determined based on the voltage detection signal and first to n-th band selection signals of the band selection signal. 15 . The radio frequency switch of claim 14 , wherein the first buffer circuit comprises: a VNEG buffer configured to provide one of the positive voltage and the negative voltage as the switching level voltage of the switching signal based on the first band selection signal when the voltage detection signal is the first voltage; and a VSS buffer configured to provide one of the positive voltage and the ground voltage as the switching level voltage of the switching signal based on the first band selection signal when the voltage detection signal is the second voltage. 16 . The radio frequency switch of claim 14 , wherein the n-th buffer circuit comprises: a VNEG buffer configured to provide one of the positive voltage and the negative voltage as the switching level voltage of the switching signal based on the n-th band selection signal when the voltage detection signal is the first voltage; and a VSS buffer configured to provide one of the positive voltage and the ground voltage as the switching level voltage of the switching signal based on the n-th band selection signal when the voltage detection signal is the second voltage. 17 . A radio frequency switch comprising: a voltage detection circuit configured to: detect a magnitude of a voltage; and generate a voltage detection signal based on the detected magnitude of the voltage; a control buffer configured to generate a switching signal based on a value of the voltage detection signal; and a switching circuit configured to perform an operation of switching one or more signal paths in response to receiving the switching signal. 18 . The radio frequency switch of claim 17 , wherein the detecting of the magnitude of the voltage comprises determining whether the detected voltage is a negative voltage (VNEG) or a ground voltage (V

Assignees

Inventors

Classifications

  • Controllable logic circuits (H03K19/177 takes precedence) · CPC title

  • Modifications for eliminating interference voltages or currents · CPC title

  • the amplifier being a radio frequency amplifier · CPC title

  • Structural combination of electric measuring instruments with basic electronic circuits, e.g. with amplifier · CPC title

  • Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels (G11C5/148 takes precedence); Switching between alternative supplies (G11C5/141 takes precedence) · CPC title

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What does patent US2019238127A1 cover?
A control buffer circuit includes a voltage detection circuit configured to detect whether a received voltage is a negative voltage or a ground voltage and provide a voltage detection signal based on a result of the detecting, and a buffer circuit configured to provide a switching signal based on the voltage detection signal, wherein the switching signal comprises a positive voltage as a switch…
Who is the assignee on this patent?
Samsung Electro Mech
What technology area does this patent fall under?
Primary CPC classification H03K17/51. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Aug 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).