Embedded processor-based three-dimensional acoustic imaging real-time signal processing device

US2019196014A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2019196014-A1
Application numberUS-201816308401-A
CountryUS
Kind codeA1
Filing dateFeb 12, 2017
Priority dateMar 1, 2017
Publication dateJun 27, 2019
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

The present invention had disclosed an embedded processor based 3D acoustic imaging real-time signal processing device of modularized design; the system comprises an embedded GPU signal processing subsystem, a signal interaction subsystem and a signal acquisition subsystem. The system takes Tegra K1 embedded GPU processor as the core; Tegra K1 embedded GPU processor is provided with features of OpenGL4.4, OpenGL ES 3.1 and CUDA, which has high parallel image processing capability and abundant high-speed data interconnection interface; it is especially applicable to high-speed data transmission and effective calculation of image algorithm for 3D acoustic imaging real-time signal processing device. Meanwhile, it can realize high-speed data interaction between signal processing subsystem and numerous signal acquisition subsystems; the whole system has powerful data interaction capability and real-time parallel processing capability.

First claim

Opening claim text (preview).

1 . An embedded processor based 3D real-time acoustic imaging signal processing device, characterized in that it comprises numerous signal acquisition subsystems, signal interaction subsystems and embedded GPU signal processing subsystems; wherein the signal acquisition system collects and receives signal data from any channel in the acoustic array according to command from embedded GPU signal processing subsystem, and proceed with preliminary processing of signal data before sending the data as preliminarily processed to the embedded GPU signal processing subsystem via the signal interaction subsystem; the embedded GPU signal processing subsystem processes preliminarily processed data as received to obtain image data. 2 . The embedded processor based 3D real-time acoustic imaging signal processing device according to claim 1 , characterized in that the signal acquisition subsystem comprises: a command interface, used to receive command from embedded GPU signal processing subsystem, and send it to FPGA chip; a FPGA chip, used to control opening or closure of any channel in the transducer array by the programmable switch according to the command received, receive preprocessing data among processed signal data from some channels in the transducer array, control programmable amplification chip according to preprocessing data to realize real-time gain control, and send preprocessing data to LVDS interface; a programmable switch, used to control opening or closure of any channel in the transducer array to realize sparsification of 3D acoustic imaging transducer array; an amplifying filter chip, used to receive and collect analog signals for amplification and filtering; a programmable amplifying chip, used for real-time gain and amplification of analog signal data as received according to control signals from FPGA chip; an AD chip, used to convert analog signals as processed into digital signal data to obtain preprocessing data, and send it to FPGA chip; and an LVDS, used to send preprocessing data in FPGA chip to signal interaction subsystem. 3 . The embedded processor based 3D real-time acoustic imaging signal processing device according to claim 1 , characterized in that the signal interaction subsystem comprises: a command interface, used to receive commands from embedded GPU signal processing subsystem, and send them to FPGA chip; multi LVDS, used to FPGA chip for synchronous receiving of preprocessing data from numerous signal acquisition subsystems; an FPGA chip, used to control multi LVDS interfaces for receiving of preprocessing data as well as synchronous buffering, sorting and packing of preprocessing data according to commands from signal acquisition subsystem; furthermore, it aims to transmit preprocessing data to PCIe bus according to commands from embedded GPU signal processing system; and a PCIe bus, used to send preprocessing data received by FPGA chip to the embedded GPU signal processing system. 4 . The embedded processor based 3D real-time acoustic imaging signal processing device according to claim 1 , characterized in that the embedded GPU signal processing subsystem comprises: a command interface, used to receive commands from embedded GPU signal processing subsystem, and send them to signal interaction subsystem and signal acquisition subsystem; a PCIe bus, used to receive preprocessing data from signal interaction subsystem, and send it to Tegra K1 embedded GPU processor; the PCIe bus can realize the maximum data transmission rate of 20 Gbps to satisfy transmission bandwidth for 3D sonar preprocessing data; a Tegra K1 embedded GPU processor, used to control data received by PCIe bus, and calculate preprocessing data as received to obtain image data, and control remote transmission of image data by Gigabit Ethernet chip, optical fiber transceiver as well as display of image data via DSI display interface; a transmission interface, used to control transmission of sonic wave in certain time sequence; a Gigabit Ethernet chip and Gigabit Ethernet interface, used to realize remote transmission of image data; a Gigabit transceiver chip and port, used to realize remote transmission of image data via the optical fiber; a DSI display interface, used to transmit image data to the display screen for display of 3D data; and a debugging interface, used to receive external command for debugging of embedded GPU signal processing subsystem.

Assignees

Inventors

Classifications

  • G06T1/20Primary

    Processor architectures; Processor configuration, e.g. pipelining · CPC title

  • G01S15/89Primary

    for mapping or imaging · CPC title

  • using a three-dimensional transducer configuration · CPC title

  • Three dimensional imaging systems · CPC title

  • Stereoscopic displays; Three-dimensional displays; Pseudo-three dimensional displays · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2019196014A1 cover?
The present invention had disclosed an embedded processor based 3D acoustic imaging real-time signal processing device of modularized design; the system comprises an embedded GPU signal processing subsystem, a signal interaction subsystem and a signal acquisition subsystem. The system takes Tegra K1 embedded GPU processor as the core; Tegra K1 embedded GPU processor is provided with features of…
Who is the assignee on this patent?
Univ Zhejiang
What technology area does this patent fall under?
Primary CPC classification G06T1/20. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Jun 27 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).