Display device

Patent metadata

Field	Value
Publication number	US-2019189059-A1
Application number	US-201816058800-A
Country	US
Kind code	A1
Filing date	Aug 8, 2018
Priority date	Dec 19, 2017
Publication date	Jun 20, 2019
Grant date	—

Abstract

A display device includes a plurality of pixel columns, a plurality of switching units, a number of which corresponds to a number of the pixel columns, and a plurality of data lines of which a number is one more than the number of the pixel columns, where each of the switching units includes a first switch which transfers a data voltage to a first data line to which some of a plurality of pixels included in a corresponding pixel column are connected, and a second switch which transfers a data voltage to a second data line to which the other of the pixels included in the corresponding pixel column are connected, and a second switch included in a first switching unit among the switching units is connected with a first switch included in a second switching unit adjacent to the first switching unit.

First claim

What is claimed is:

1 . A display device comprising:
a data driver which generates first and second data voltages; a first output line which includes a first end connected with the data driver and a second end connected with a first input node, and receives the first data voltage corresponding to a first pixel column; a second output line which includes a first end connected with the data driver and a second end connected with a second input node, and receives the second data voltage corresponding to a second pixel column; a first output node connected with a first data line; a second output node connected with a second data line adjacent to the first data line; a third output node connected with a third data line adjacent to the second data line; a first switching unit connected with the first input node, the first output node and the second output node, and which selectively transfers the first data voltage applied to the first output line, to the first data line and the second data line; and a second switching unit connected with the second input node, the second output node and the third output node, and which selectively transfers the second data voltage applied to the second output line, to the second data line and the third data line.

2 . The display device of claim 1 , wherein the first switching unit includes:
a first switch which includes a gate electrode to which a first demux control signal is applied, a first electrode connected with the first input node, and a second electrode connected with the first output node; and a second switch which includes a gate electrode to which a second demux control signal is applied, a first electrode connected with the first input node, and a second electrode connected with the second output node.

3 . The display device of claim 2 , wherein the second switching unit includes:
a third switch which includes a gate electrode to which the first demux control signal is applied, a first electrode connected with the second input node, and a second electrode connected with the second output node; and a fourth switch which includes a gate electrode to which the second demux control signal is applied, a first electrode connected with the second input node, and a second electrode connected with the third output node.

4 . The display device of claim 3 , wherein the second demux control signal is a reverse phase signal of the first demux control signal.

5 . The display device of claim 1 , wherein the first pixel column includes a plurality of first pixels positioned between the first data line and the second data line,
the second pixel column includes a plurality of second pixels positioned between the second data line and the third data line, pixels positioned in an odd-numbered pixel row among the first pixels are connected with the first data line, pixels positioned in an even-numbered pixel row among the first pixels are connected with the second data line, pixels positioned in an odd-numbered pixel row among the second pixels are connected with the second data line, and pixels positioned in an even-numbered pixel row among the second pixels are connected with the third data line.

6 . The display device of claim 5 , further comprising:
a plurality of gate lines connected with the first pixels and the second pixels; and a gate driver which sequentially applies gate signals of gate-on voltages to the gate lines, wherein the gate signals of gate-on voltages are applied during two horizontal periods, and two sequential gate signals of gate-on voltages among the gate signals of gate-on voltages overlap each other during one horizontal period.

7 . The display device of claim 6 , wherein the first switching unit transfers the first data voltage to the first data line in response to a first demux control signal, and transfers the first data voltage to the second data line in response to a second demux control signal,
the second switching unit transfers the second data voltage to the second data line in response to the first demux control signal, and transfers the second data voltage to the third data line in response to the second demux control signal, each of the first demux control signal and the second demux control signal is a combination of a gate-on voltage during one horizontal period and a gate-off voltage during another horizontal period, respectively, and the gate-on voltage is a voltage turning on a switch included in the first or second switching unit.

8 . The display device of claim 7 , wherein the first demux control signal is applied as the gate-on voltage at a time point when a gate signal applied to a gate line corresponding to the odd-numbered pixel row is applied as a gate-on voltage of the pixels in the odd-numbered pixel row among the first and second pixels.

9 . The display device of claim 8 , wherein the second demux control signal is applied as the gate-on voltage at a time point when a gate signal applied to a gate line corresponding to the even-numbered pixel row is applied as a gate-on voltage of the pixels in the even-numbered pixel row among the first and second pixels.

10 . The display device of claim 7 , wherein the first demux control signal is applied as the gate-on voltage after a predetermined preceding time since a time point when a gate signal is applied to a gate line corresponding to the odd-numbered pixel row is applied as a gate-on voltage of the pixels in the odd-numbered pixel row among the first and second pixels.

11 . The display device of claim 10 , wherein the second demux control signal is applied as the gate-on voltage after the preceding time since a time point when a gate signal applied to a gate line corresponding to the even-numbered pixel row is applied as a gate-on voltage of the pixels in the even-numbered pixel row among the first and second pixels.

12 . The display device of claim 11 , wherein the preceding time corresponds to a time for changing a gate signal from a gate-off voltage to a gate-on voltage.

13 . The display device of claim 11 , wherein the preceding time is one half of the horizontal period.

14 . A display device comprising:
a first pixel column which includes a plurality of first pixels arranged in a second direction; a second pixel column which is adjacent to the first pixel column and includes a plurality of second pixels arranged in the second direction; a first data line positioned at a first side of the first pixel column and which extends in the second direction; a second data line positioned between the first pixel column and the second pixel column and which extends in the second direction; a third data line positioned at a second side of the second pixel column and which extends in the second direction; a first switching unit which selectively applies a first data voltage applied to a first output line corresponding to the first pixel column, to the first data line and the second data line; and a second switching unit which selectively applies a second data voltage applied to a second output line corresponding to the second pixel column, to the second data line and the third data line.

15 . The display device of claim 14 , wherein pixels positioned in an odd-numbered pixel row among the first pixels are connected with the first data line,
pixels positioned in an even-numbered pixel row among the first pixels are connected with the second data line, pixels positioned in an odd-numbered pixel row among the second pixels are connected with the second data line, and pixels positioned in an even-numbered pixel row among second pixels are con

Assignees

• Samsung Display Co Ltd

Inventors

• Na Ji Su
• Jeon Hee Jin

Classifications

• G09G3/3677

  suitable for active matrices only · CPC title

• G09G3/3688

  suitable for active matrices only · CPC title

• G09G2320/0242

  Compensation of deficiencies in the appearance of colours · CPC title

• G09G2320/0209

  Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display · CPC title

• G09G3/3225

  using an active matrix · CPC title