Power amplifier time-delay invariant predistortion methods and apparatus

Patent metadata

Field	Value
Publication number	US-2019181807-A1
Application number	US-201816118329-A
Country	US
Kind code	A1
Filing date	Aug 30, 2018
Priority date	May 1, 2002
Publication date	Jun 13, 2019
Grant date	—

Abstract

An embodiment of the invention is a time-delay invariant predistortion approach to linearize power amplifiers in wireless RF transmitters. The predistortion architecture is based on the stored-compensation or memory-compensation principle by using a combined time-delay addressing method, and therefore, the architecture has an intrinsic, self-calibrating time-delay compensation function. The predistortion architecture only uses a lookup table to conduct both the correction of non-linear responses of a power amplifier and the compensation of any time-delay effects presented in the same system. Due to the time-delay invariant characteristic, the predistortion design has a wider dynamic range processing advantage for wireless RF signals, and therefore can be implemented in multi-carrier and multi-channel wireless systems.

First claim

1 . (canceled)

2 . A predistortion system for linearizing the output of a power amplifier, the predistortion system comprising:
a feedback receiver configured to receive a feedback signal representative of at least one nonlinear characteristic of the power amplifier, the power amplifier configured to amplify an input signal comprising a radio frequency (RF) modulated signal in digital form; and a predistortion processor communicatively coupled with the feedback receiver, the predistortion processor comprising a lookup table of a predetermined size configured to receive the input signal.

3 . The predistortion system of claim 2 , wherein the input signal is a current input signal and the lookup table is configured with a memory function that enables the lookup table to store the current input signal and at least one previous input signal.

4 . The predistortion system of claim 3 , wherein an addressing of the lookup table is based on a sequence of a series of previous input signals.

5 . The predistortion system of claim 4 , wherein an addressing of the lookup table is implemented by a set of N-bit vector data that comprises a current input signal as well as previous N input signals.

6 . The predistortion system of claim 3 , wherein each output signal of the lookup table is based on both the current input signal and the at least one previous input signal.

7 . The predistortion system of claim 2 , wherein an output of the lookup table includes a time delay correction element.

8 . The predistortion system of claim 2 , wherein the predistortion processor is configured to generate a correction factor for correcting at least one nonlinear characteristic of the power amplifier based on at least an input of the lookup table.

9 . The predistortion system of claim 8 , further comprising a processor configured to combine the RF modulated signal with a second signal corresponding to the correction factor.

10 . The predistortion system of claim 9 , wherein the processor is further configured to supply the combined RF modulated signal with the feedback signal to the power amplifier to linearize the output of the power amplifier.

11 . The predistortion system of claim 8 , further comprising combining logic to combine the RF modulated signal with a signal corresponding to the correction factor.

12 . The predistortion system of claim 11 , wherein combining logic is performed to also supply the combined RF modulated signal and feedback signal to the power amplifier to linearize the output of the power amplifier.

13 . The predistortion system of claim 2 , further comprising a serial shift register for forming an address for the lookup table.

14 . The predistortion system of claim 2 , wherein the lookup table comprises at least one correction value.

15 . The predistortion system of claim 15 , wherein the at least one correction value falls within a range determined by the predetermined size of the lookup table.

16 . The predistortion system of claim 2 , wherein the lookup table is configured to respond to inputs derived from outputs of the lookup table.

17 . The predistortion system of claim 2 , further comprising an input component comprising an analog to digital converter configured to output the input signal in digital form to the predistortion controller.

Assignees

• Dali Wireless Inc

Inventors

• Yang Dali
• Yang Jia

Classifications

• H03F3/24

  of transmitter output stages · CPC title

• H03F2201/3224

  Predistortion being done for compensating memory effects · CPC title

• H03F2201/3233

  Adaptive predistortion using lookup table, e.g. memory, RAM, ROM, LUT, to generate the predistortion · CPC title

• H04L1/0044

  specially adapted for power saving · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title