Chip capacitor
US-2017309404-A1 · Oct 26, 2017 · US
US2019122820A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2019122820-A1 |
| Application number | US-201816221789-A |
| Country | US |
| Kind code | A1 |
| Filing date | Dec 17, 2018 |
| Priority date | Jun 28, 2016 |
| Publication date | Apr 25, 2019 |
| Grant date | — |
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A capacitor that prevents generation of a substrate capacitance composed of an upper electrode, a substrate, and a lower electrode. Specifically, the capacitor includes a substrate; a lower electrode disposed on the substrate; a dielectric film disposed on the lower electrode; an upper electrode disposed on a part of the dielectric film; and a first terminal electrode that is connected to the upper electrode. Moreover, the upper electrode and the first terminal electrode are formed in a region for forming the lower electrode in a plan view of the capacitor viewed from the first terminal electrode side.
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1 . A capacitor comprising: a substrate; a lower electrode disposed on the substrate; a dielectric film disposed on at least a portion of the lower electrode; an upper electrode disposed on a portion of the dielectric film; and a first terminal electrode disposed above the upper electrode and coupled thereto, wherein the upper electrode and the first terminal electrode are disposed in a region where the lower electrode is formed in a plan view of the capacitor relative to the first terminal electrode. 2 . The capacitor according to claim 1 , further comprising a second terminal electrode coupled to the lower electrode and disposed in the region where the lower electrode is formed in the plan view of the capacitor relative to the first terminal electrode. 3 . The capacitor according to claim 2 , wherein the dielectric film comprises a cavity with the second terminal electrode disposed therein and directly coupled to the lower electrode. 4 . The capacitor according to claim 1 , wherein the upper electrode is disposed in a region where the first terminal electrode is formed in a plan view of the capacitor relative to the first terminal electrode. 5 . The capacitor according to claim 1 , further comprising at least one trench disposed in a region of the substrate on which the lower electrode is disposed. 6 . The capacitor according to claim 5 , wherein each of the lower electrode, the dielectric film, and the upper electrode comprise an uneven shape that conforms to the at least one trench of the substrate. 7 . The capacitor according to claim 1 , further comprising a pyramid structure disposed in a region of the substrate on which the lower electrode is disposed. 8 . The capacitor according to claim 7 , wherein each of the lower electrode, the dielectric film, and the upper electrode comprise an uneven shape that conforms to the pyramid structure of the substrate. 9 . The capacitor according to claim 1 , further comprising an insulating film disposed between the substrate and the lower electrode. 10 . The capacitor according to claim 1 , wherein the upper electrode and the first terminal electrode are disposed in a region within a peripheral edge of the lower electrode in the plan view of the capacitor relative to the first terminal electrode. 11 . The capacitor according to claim 10 , wherein the upper electrode and the first terminal electrode are disposed in a position relative to the lower electrode, such that electric force from the upper electrode and the first terminal electrode pass through the dielectric film and into the lower electrode when a voltage is applied to the first terminal electrode, and the upper and lower electrodes are not capacitively coupled across the substrate. 12 . The capacitor according to claim 2 , further comprising: a protective layer disposed on the dielectric film, wherein the protective layer comprises a plurality of cavities with the upper electrode and the first terminal electrode disposed in a first cavity of the protective layer and the second terminal electrode disposed in a second cavity of the protective layer. 13 . The capacitor according to claim 12 , wherein each of the first and second terminal electrodes are disposed only on an upper surface of the protective layer. 14 . A capacitor comprising: a substrate; a lower electrode disposed above the substrate and having an outer perimeter; a dielectric film disposed on at least a portion of the lower electrode; an upper electrode disposed on a portion of the dielectric film and in a region within the outer perimeter of the lower electrode relative to a plan view of the substrate; and a first terminal electrode disposed above the upper electrode and coupled thereto, with the first terminal electrode disposed in the region within the outer perimeter of the lower electrode relative to the plan view of the substrate. 15 . The capacitor according to claim 14 , further comprising: a second terminal electrode coupled to the lower electrode and disposed in a region within the outer perimeter of the lower electrode relative to the plan view of the substrate, wherein the dielectric film comprises a cavity with the second terminal electrode disposed therein and directly coupled to the lower electrode. 16 . The capacitor according to claim 14 , further comprising: at least one trench disposed in a region of the substrate on which the lower electrode is disposed, wherein each of the lower electrode, the dielectric film, and the upper electrode comprise an uneven shape that conforms to the at least one trench of the substrate. 17 . The capacitor according to claim 14 , further comprising: a pyramid structure disposed in a region of the substrate on which the lower electrode is disposed, wherein each of the lower electrode, the dielectric film, and the upper electrode comprise an uneven shape that conforms to the pyramid structure of the substrate. 18 . The capacitor according to claim 14 , further comprising an insulating film disposed between the substrate and the lower electrode. 19 . The capacitor according to claim 14 , wherein the upper electrode and the first terminal electrode are disposed in a position relative to the lower electrode, such that electric force from the upper electrode and the first terminal electrode pass through the dielectric film and into the lower electrode when a voltage is applied to the first terminal electrode, and the upper and lower electrodes are not capacitively coupled across the substrate. 20 . The capacitor according to claim 15 , further comprising: a protective layer disposed on the dielectric film, wherein the protective layer comprises a plurality of cavities with the upper electrode and the first terminal electrode disposed in a first cavity of the protective layer and the second terminal electrode disposed in a second cavity of the protective layer.
Dielectrics · CPC title
Electrodes · CPC title
Thin- or thick-film capacitors {(thin- or thick-film circuits; capacitors without a potential-jump or surface barrier specially adapted for integrated circuits, details thereof, multistep manufacturing processes therefor)} · CPC title
Form of non-self-supporting electrodes · CPC title
Selection of materials · CPC title
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