Method and Apparatus for Boot Variable Protection

US2019114433A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2019114433-A1
Application numberUS-201816206092-A
CountryUS
Kind codeA1
Filing dateNov 30, 2018
Priority dateJun 2, 2017
Publication dateApr 18, 2019
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method and apparatus for protecting boot variables is disclosed. A computer system includes a main processor and an auxiliary processor. The auxiliary processor is associated with a non-volatile memory that stores variables associated with boot code that is also stored thereon. The main processor may send a request to the auxiliary processor to alter one of the variables stored in the non-volatile memory. Responsive to receiving the request, the auxiliary processor may execute a security policy to determine if the main processor meets the criteria for altering the variable. If the auxiliary processor determines that the main processor meets the criteria, it may grant permission to alter the variable.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method, comprising: a first processor receiving a request from a second processor to alter a first variable associated with boot code of the second processor, wherein the receiving includes the second processor storing the request in a mailbox circuit and sending a separate indication of the storing to the first processor; in response to the indication and the request, the first processor evaluating a security policy to determine whether the second processor meets criteria for altering the first variable; and the first processor granting permission to the second processor to alter the first variable responsive to determining that the second processor meets the criteria for altering the first variable. 2 . The method of claim 1 , wherein the first processor is configured to inhibit the second processor from altering the first variable responsive to determining that the second processor does not meet the criteria for altering the first variable, wherein the first variable is stored in a non-volatile memory external to the first processor and accessible to the second processor via the first processor. 3 . The method of claim 1 , wherein the evaluating includes determining whether the second processor is operating in a recovery mode that provides a reduced set of capabilities relative to a set of capabilities available during execution of an operating system by the second processor. 4 . The method of claim 1 , wherein the evaluating includes determining whether the second processor has provided proper credentials for altering the first variable. 5 . The method of claim 1 , wherein the first variable is one of a plurality of boot variables accessed during a boot procedure in which the boot code is executed by the second processor. 6 . The method of claim 5 , further comprising: the second processor requesting access to one of the plurality of boot variables during a boot procedure, wherein the first processor evaluates the security policy during the boot procedure to determine whether to grant access to the one of the plurality of variables. 7 . The method of claim 5 , wherein the first processor is configured to limit access to the plurality of variables by the second processor to a single one of the boot variables at a given time. 8 . The method of claim 5 , further comprising: the second processor conveying a request to the first processor to delete one of the plurality of variables; responsive to receiving the request, the first processor evaluating the security policy to determine whether the second processor is authorized to delete the one of the plurality of variables; and responsive to determining that the second processor is authorized, the first processor granting permission to the second processor to delete the one of the plurality of variables. 9 . The method of claim 5 , further comprising: the first processor adding a new variable to the plurality of variables; and the first processor setting attributes associated with the new variable. 10 . The method of claim 9 , wherein the attributes associated with the new variable include one or more of the following: an operating mode in which the new variable may be altered; an indication as to whether the new variable can be deleted; and credentials required for access to the new variable. 11 . A computer system comprising: a main processor; an auxiliary processor; and a non-volatile memory a plurality of variables stored therein, wherein the main processor is configured to use the plurality of variables during a boot procedure; wherein the auxiliary processor is configured to: receive, at a mailbox circuit, a request to alter a first variable of the plurality of variables by the main processor; receive an indication of the request being received at the mailbox circuit; in response to the request and the indication, enforce a security policy that includes determining whether the main processor meets criteria for altering the first variable; and grant permission to alter the first variable to the main processor responsive to determining that the main processor meets criteria for altering the variable. 12 . The computer system of claim 11 , wherein the auxiliary processor is configured to: deny the main processor access to the first variable responsive to determining that the main processor has not met the criteria for altering the variable. 13 . The computer system of claim 11 , wherein the criteria include a criterion that the main processor is operating in a recovery mode. 14 . The computer system of claim 11 , wherein the criteria include a criterion that the main processor has provided proper credentials for altering the first variable. 15 . The computer system of claim 11 , wherein the auxiliary processor is configured to: verify boot code of the main processor during the boot procedure. 16 . The computer system of claim 15 , wherein the boot code is stored in the non-volatile memory with the first variable. 17 . The computer system of claim 11 , wherein the auxiliary processor is configured to: receive a request from the main processor to delete one of the plurality of variables; and determine whether to allow deletion of the one of the plurality of variables based on at least a current operating mode of the main processor and credentials provided by the main processor. 18 . A method, comprising: an auxiliary processor in a computer system receiving a request at a mailbox circuit of an auxiliary processor, wherein the request is from a main processor of the computer system to alter a first one of a plurality of boot variables stored in a non-volatile memory accessible to the auxiliary processor; the auxiliary processor evaluating a security policy to determine whether to grant the main processor permission to alter the first boot variable, wherein determining whether to grant the main processor access includes the auxiliary processor: determining whether the main processor is operating in recovery mode; and determining whether the main processor has provided authorization credentials for altering the first boot variable; and the auxiliary processor granting permission to the main processor to alter the first boot variable to determining that the main processor is operating in the recovery mode and has provided the authorization credentials. 19 . The method of claim 18 , wherein the non-volatile memory is external to the auxiliary processor, and wherein the plurality of boot variables include variables defined in a unified extensible firmware interface (UEFI) specification. 20 . The method of claim 18 , wherein the request is received during a boot procedure of the main processor in which the auxiliary processor verifies boot code of the main processor.

Assignees

Inventors

Classifications

  • Bootstrapping (security arrangements therefor G06F21/57) · CPC title

  • Test or assess software · CPC title

  • in semiconductor storage media, e.g. directly-addressable memories · CPC title

  • Secure firmware programming, e.g. of basic input output system [BIOS] · CPC title

  • G06F21/575Primary

    Secure boot · CPC title

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What does patent US2019114433A1 cover?
A method and apparatus for protecting boot variables is disclosed. A computer system includes a main processor and an auxiliary processor. The auxiliary processor is associated with a non-volatile memory that stores variables associated with boot code that is also stored thereon. The main processor may send a request to the auxiliary processor to alter one of the variables stored in the non-vol…
Who is the assignee on this patent?
Apple Inc
What technology area does this patent fall under?
Primary CPC classification G06F21/575. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Apr 18 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).