Semiconductor device and method for manufacturing semiconductor device

Patent metadata

Field	Value
Publication number	US-2019081075-A1
Application number	US-201716078249-A
Country	US
Kind code	A1
Filing date	Feb 21, 2017
Priority date	Feb 22, 2016
Publication date	Mar 14, 2019
Grant date	—

Abstract

A method of producing a semiconductor device according to an embodiment of the present invention includes: step (C) of forming an oxide semiconductor layer of a plurality of thin film transistors on a gate dielectric layer; step (F) of forming an aperture in an interlevel dielectric layer, the aperture being located between an active region and a plurality of terminal portions and extending through the interlevel dielectric layer; and step (G) of, after step (F), forming an upper conductive portion on the interlevel dielectric layer. In step (C), a protection layer made of the same oxide semiconductor film as the oxide semiconductor layer is formed above a region of the gate dielectric layer that is located between the active region and the plurality of terminal portions. In step (F), the aperture is formed so as to overlap the protection layer.

First claim

1 . A method of producing a semiconductor device which includes a substrate, a plurality of first thin film transistors supported on the substrate, an interlevel dielectric layer covering the plurality of first thin film transistors, and a plurality of terminal portions electrically connecting the plurality of first thin film transistors to corresponding external wiring lines, each of the plurality of terminal portions including an upper conductive portion provided on the interlevel dielectric layer,
the semiconductor device having an active region in which the plurality of first thin film transistors are provided, and a peripheral region being located around the active region and having the plurality of terminal portions provided therein, the method comprising: step (A) of forming gate electrodes of the plurality of first thin film transistors on the substrate; step (B) of forming a gate dielectric layer covering the gate electrodes; step (C) of forming an oxide semiconductor layer of the plurality of thin film transistors on the gate dielectric layer; step (D) of forming source electrodes and drain electrodes of the plurality of thin film transistors; step (E) of forming the interlevel dielectric layer so as to cover the plurality of thin film transistors; step (F) of forming an aperture in the interlevel dielectric layer, the aperture being located between the active region and the plurality of terminal portions and extending through the interlevel dielectric layer; and step (G) of, after step (F), forming the upper conductive portion on the interlevel dielectric layer, wherein, in step (C), above a region of the gate dielectric layer that is located between the active region and the plurality of terminal portions, a protection layer is formed from a same oxide semiconductor film as the oxide semiconductor layer; and in step (F), the aperture is formed so as to overlap the protection layer.

2 . The method of producing a semiconductor device of claim 1 , wherein, in step (G), lines extending from the upper conductive portion are formed, the lines extending via the aperture toward the active region.

3 . The method of producing a semiconductor device of claim 2 , wherein, in step (F), the aperture is formed so as to have a region in which the protection layer overlaps the aperture and a region in which the protection layer does not overlap the aperture.

4 . The method of producing a semiconductor device of claim 1 , wherein,
each of the plurality of terminal portions includes a lower conductive portion made of a same conductive film as the gate electrodes, the lower conductive portion being electrically connected to the upper conductive portion in a contact hole made in the gate dielectric layer and in the interlevel dielectric layer; and in step (A), together with the gate electrodes, the lower conductive portions and lines extending from the lower conductive portions are formed, the lines extending under the aperture toward the active region.

5 . The method of producing a semiconductor device of claim 1 , further comprising step (H) of removing the protection layer.

6 . The method of producing a semiconductor device of claim 1 , not comprising a step of removing the protection layer.

7 . The method of producing a semiconductor device of claim 2 , further comprising step (H) of partly removing the protection layer, wherein,
in step (H), a plurality of islets of oxide semiconductor are formed by partly removing the protection layer; and each of the plurality of islets of oxide semiconductor is disposed so as not to be in contact with two or more said lines.

8 . The method of producing a semiconductor device of claim 1 , wherein the interlevel dielectric layer includes: a first dielectric layer provided so as to cover the source electrodes and drain electrodes; and
a second dielectric layer provided on the first dielectric layer.

9 - 16 . (canceled)

17 . The method of producing a semiconductor device of claim 8 , wherein,
the first dielectric layer is made of an inorganic insulative material; and the second dielectric layer is made of an organic insulative material.

18 . The method of producing a semiconductor device of claim 1 , wherein the semiconductor device further includes a plurality of second thin film transistors supported on the substrate, each including a crystalline silicon semiconductor layer.

19 . The method of producing a semiconductor device of claim 18 , comprising, before step (A):
step (I) of forming the crystalline silicon semiconductor layer of the plurality of second thin film transistors on the substrate; and step (J) of forming a further gate dielectric layer covering the crystalline silicon semiconductor layer, wherein, in step (A), on the further gate dielectric layer, the gate electrodes of the plurality of second thin film transistors are formed from a same conductive film as the gate electrodes of the plurality of first thin film transistors.

20 . The method of producing a semiconductor device of claim 1 , wherein each of the plurality of first thin film transistors has a channel-etch structure.

21 . The method of producing a semiconductor device of claim 1 , wherein the oxide semiconductor layer comprises an In—Ga—Zn—O based semiconductor.

22 . (canceled)

23 . A semiconductor device comprising:
a substrate; a plurality of first thin film transistors supported on the substrate; an interlevel dielectric layer covering the plurality of first thin film transistors; and a plurality of terminal portions electrically connecting the plurality of first thin film transistors to corresponding external wiring lines, the semiconductor device having an active region in which the plurality of first thin film transistors are provided, and a peripheral region being located around the active region and having the plurality of terminal portions provided therein, wherein, each of the plurality of first thin film transistors includes a gate electrode provided on the substrate, a gate dielectric layer covering the gate electrodes, an oxide semiconductor layer provided on the gate dielectric layer, and a source electrode and a drain electrode electrically connected to the oxide semiconductor layer; the interlevel dielectric layer has an aperture formed between the active region and the plurality of terminal portions, the aperture extending through the interlevel dielectric layer; the semiconductor device further comprises a protection layer above a region of the gate dielectric layer that is located between the active region and the plurality of terminal portions, the protection layer being made of a same oxide semiconductor film as the oxide semiconductor layer; and the aperture is formed so as to at least partly overlap the protection layer.

24 . The semiconductor device of claim 23 , wherein the interlevel dielectric layer includes: a first dielectric layer provided so as to cover the source electrodes and drain electrodes; and a second dielectric layer provided on the first dielectric layer.

25 - 26 . (canceled)

27 . The method of producing a semiconductor device of claim 24 , wherein,
the first dielectric layer is made of an inorganic insulative material; and the second dielectric layer is made of an organic insulative material.

28 . The semiconductor device of claim 23 , wherein,
each of the plurality of terminal portions includes an upper conductive portion provided on the interlevel dielectric layer; and the semiconductor device f

Assignees

• Sharp Kk

Inventors

• ITO Kazuatsu
• Kaneko Seiji
• Kanzaki Yohsuke
• Saitoh Takao
• Nakazawa Makoto

Classifications

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• H01L29/78651

  Electricity · mapped topic

• H01L27/1288

  Electricity · mapped topic

• H01L27/1225

  Electricity · mapped topic

• H01L29/42384

  Electricity · mapped topic