Capacitor

US2019074348A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2019074348-A1
Application numberUS-201816180577-A
CountryUS
Kind codeA1
Filing dateNov 5, 2018
Priority dateJul 7, 2016
Publication dateMar 7, 2019
Grant date

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A capacitor that includes a substrate; a lower electrode formed on the substrate, and including an upper surface, a lower surface and an end surface that connects the upper surface and the lower surface. Moreover, the capacitor includes a dielectric film formed on the lower electrode; an upper electrode formed on the dielectric film; and a terminal electrode connected to the upper electrode. Furthermore, the upper surface of the lower electrode is formed in a region on an inner side of a periphery of the lower surface of the lower electrode with at least part of the end surface being a tapered shape.

First claim

Opening claim text (preview).

1 . A capacitor comprising: a substrate; a lower electrode disposed on the substrate, the lower electrode including an upper surface, a lower surface and an end surface that connects the upper surface to the lower surface; a dielectric film disposed on the lower electrode; an upper electrode disposed on the dielectric film; and a terminal electrode electrically connected to the upper electrode, wherein at least part of a periphery of the upper surface of the lower electrode is disposed in a region inside a periphery of the lower surface of the lower electrode in a plan view of the lower electrode relative to a thickness direction of the capacitor, and wherein at least part of the end surface that connects the upper surface to the lower surface has a tapered shape. 2 . The capacitor according to claim 1 , wherein the terminal electrode includes an upper surface, a lower surface, and an end surface that connects the upper surface to the lower surface, and wherein at least part of a periphery of the lower surface of the terminal electrode is disposed inside a periphery of the upper surface of the terminal electrode in the plan view of the terminal electrode relative to the thickness direction of the capacitor. 3 . The capacitor according to claim 2 , wherein at least part of the end surface of the terminal electrode has a tapered shape. 4 . The capacitor according to claim 1 , further comprising a barrier film disposed between the lower electrode and the dielectric film. 5 . The capacitor according to claim 4 , wherein the barrier film complete covers the electrode. 6 . The capacitor according to claim 1 , wherein the tapered shape of the end surface of the lower electrode is configured such that a cross-sectional width of the lower electrode gradually decreases from the lower surface to the upper surface. 7 . The capacitor according to claim 6 , wherein an angle θ between the lower surface and the end surface of the lower electrode is between 30° and 60°. 8 . The capacitor according to claim 7 , wherein the angle θ between the lower surface and the end surface of the lower electrode is between 40° and 50°. 9 . The capacitor according to claim 1 , wherein the lower surface of the lower electrode has a greater surface area than the upper surface of the lower electrode. 10 . The capacitor according to claim 9 , wherein the periphery of the upper surface of the lower electrode is completely disposed inside the periphery of the lower surface of the lower electrode in the plan view of the lower electrode relative to the thickness direction of the capacitor. 11 . The capacitor according to claim 1 , further comprising a contact electrode disposed in an opening of the dielectric film and directly coupled to the lower electrode. 12 . The capacitor according to claim 11 , wherein the dielectric film electrically insulates the upper electrode from the contact electrode. 13 . The capacitor according to claim 12 , wherein the contact electrode is electrically coupled to another terminal electrode. 14 . The capacitor according to claim 1 , wherein the end surface of the lower electrode overlaps the terminal electrode in the plan view of the lower electrode relative to the thickness direction of the capacitor. 15 . A capacitor comprising: a substrate; a lower electrode disposed on the substrate, the lower electrode including an upper surface, a lower surface and a side surface that connects the upper surface to the lower surface; an upper electrode disposed the lower electrode with a dielectric film disposed therebetween; a terminal electrode electrically connected to the upper electrode, wherein the side surface of the lower electrode is tapered outward from the upper surface to the lower surface of the lower electrode, such that the lower surface has a greater surface area than the upper surface. 16 . The capacitor according to claim 15 , wherein the terminal electrode includes an upper surface, a lower surface, and an end surface that connects the upper surface to the lower surface, wherein at least part of a periphery of the lower surface of the terminal electrode is disposed inside a periphery of the upper surface of the terminal electrode in the plan view of the terminal electrode relative to the thickness direction of the capacitor, and wherein at least part of the end surface of the terminal electrode has a tapered shape. 17 . The capacitor according to claim 15 , further comprising a barrier film disposed between the lower electrode and the dielectric film. 18 . The capacitor according to claim 15 , wherein an angle θ between the lower surface and the side surface of the lower electrode is between 30° and 60°. 19 . The capacitor according to claim 15 , wherein a periphery of the upper surface of the lower electrode is completely disposed inside a periphery of the lower surface of the lower electrode in a plan view of the lower electrode relative to a thickness direction of the capacitor. 20 . The capacitor according to claim 15 , further comprising: a contact electrode disposed in an opening of the dielectric film and directly coupled to the lower electrode, wherein the dielectric film electrically insulates the upper electrode from the contact electrode.

Assignees

Inventors

Classifications

  • Thin- or thick-film capacitors {(thin- or thick-film circuits; capacitors without a potential-jump or surface barrier specially adapted for integrated circuits, details thereof, multistep manufacturing processes therefor)} · CPC title

  • Structural combinations of capacitors or other devices covered by at least two different main groups of this subclass with other electric elements, not covered by this subclass, e.g. RC combinations · CPC title

  • having a dielectric selected for the variation of its permittivity with applied voltage, i.e. ferroelectric capacitors (electrets H01G7/02) · CPC title

  • Structural combinations of fixed capacitors with other electric elements, the structure mainly consisting of a capacitor, e.g. RC combinations · CPC title

  • H01L28/75Primary

    Electricity · mapped topic

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What does patent US2019074348A1 cover?
A capacitor that includes a substrate; a lower electrode formed on the substrate, and including an upper surface, a lower surface and an end surface that connects the upper surface and the lower surface. Moreover, the capacitor includes a dielectric film formed on the lower electrode; an upper electrode formed on the dielectric film; and a terminal electrode connected to the upper electrode. Fu…
Who is the assignee on this patent?
Murata Manufacturing Co
What technology area does this patent fall under?
Primary CPC classification H01L28/75. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Mar 07 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).