Multilayer substrate and a manufacturing method of the multilayer substrate

US2019057803A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2019057803-A1
Application numberUS-201816166225-A
CountryUS
Kind codeA1
Filing dateOct 22, 2018
Priority dateMay 19, 2016
Publication dateFeb 21, 2019
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multilayer substrate includes first and second insulating layers stacked in a stacking direction with the second insulating layer located at a first side of the first insulating layer in the stacking direction, a first coil pattern disposed on a first principal surface of the first insulating layer on the first side of the first insulating layer in the stacking direction, and a second coil pattern disposed on a first principal surface of the second insulating layer on the first side of the second insulating layer in the stacking direction. The first and second coil patterns have spiral shapes. When viewed from the layer stacking direction, at least a portion of a first area in which the first coil pattern is disposed and at least a portion of a second area in which the second coil pattern is disposed overlap each other.

First claim

Opening claim text (preview).

What is claimed is: 1 . A multilayer substrate comprising: an element assembly including a first insulating layer and a second insulating layer which are stacked in layers in a layer stacking direction such that the second insulating layer is located at a first side of the first insulating layer with respect to the layer stacking direction; a first coil pattern disposed on a first principal surface of the first insulating layer that is on the first side of the first insulating layer with respect to the layer stacking direction; and a second coil pattern disposed on a first principal surface of the second insulating layer that is on a first side of the second insulating layer with respect to the layer stacking direction; wherein each of the first coil pattern and the second coil pattern has a two-dimensional spiral shape including turns when viewed from the layer stacking direction; when viewed from the layer stacking direction, at least a portion of a first area in which the first coil pattern is disposed and at least a portion of a second area in which the second coil pattern is disposed overlap each other; a maximum thickness of the second coil pattern is smaller than a maximum thickness of the first coil pattern; when viewed from the layer stacking direction, the second coil pattern includes an overlapping portion which overlaps the first coil pattern or includes a portion which is located between two radially adjacent portions of the first coil pattern; an imaginary line is defined by connecting points at which a thickness of the first coil pattern reaches a maximum in cross-sectional views of the first coil pattern along lines perpendicular or substantially perpendicular to a direction in which the first coil pattern extends; and when viewed from the layer stacking direction, an outermost portion of the imaginary line does not overlap the second coil pattern. 2 . The multilayer substrate according to claim 1 , wherein non-uniformity of the second coil pattern in a dimension in the layer stacking direction is smaller than non-uniformity of the first coil pattern in a dimension in the layer stacking direction. 3 . The multilayer substrate according to claim 1 , wherein the first coil pattern includes an underlayer conductor disposed on the first principal surface of the first insulating layer and a plated layer disposed on the underlayer conductor. 4 . The multilayer substrate according to claim 1 , wherein the first coil pattern and the second coil pattern are electrically connected to each other. 5 . The multilayer substrate according to claim 1 , wherein the element assembly further includes a third insulating layer which is stacked to be located at a second side of the first insulating layer with respect to the layer stacking direction; the multilayer substrate further includes: a third coil pattern disposed on a second principal surface of the first insulating layer that is on the second side of the first insulating layer with respect to the layer stacking direction; and a fourth coil pattern disposed on a second principal surface of the third insulating layer that is on a second side of the third insulating layer with respect to the layer stacking direction; when viewed from the layer stacking direction, at least a portion of a third area in which the third coil pattern is disposed and at least a portion of a fourth area in which the fourth coil pattern is disposed overlap each other; and a maximum thickness of the fourth coil pattern is smaller than a maximum thickness of the third coil pattern. 6 . A multilayer substrate comprising: an element assembly including a first insulating layer and a second insulating layer which are stacked in layers in a layer stacking direction such that the second insulating layer is located at a first side of the first insulating layer with respect to the layer stacking direction; a first coil pattern disposed on a first principal surface of the first insulating layer that is on the first side of the first insulating layer with respect to the layer stacking direction; and a second coil pattern disposed on a first principal surface of the second insulating layer that is on a first side of the second insulating layer with respect to the layer stacking direction; wherein each of the first coil pattern and the second coil pattern has a two-dimensional spiral shape including turns when viewed from the layer stacking direction; when viewed from the layer stacking direction, at least a portion of a first area in which the first coil pattern is disposed and at least a portion of a second area in which the second coil pattern is disposed overlap each other; a maximum thickness of the second coil pattern is smaller than a maximum thickness of the first coil pattern; when viewed from the layer stacking direction, the second coil pattern includes an overlapping portion which overlaps the first coil pattern or includes a portion which is located between two radially adjacent portions of the first coil pattern; an imaginary line is defined by connecting points at which a thickness of the first coil pattern reaches a maximum in cross-sectional views of the first coil pattern along lines perpendicular or substantially perpendicular to a direction in which the first coil pattern extends; and when viewed from the layer stacking direction, the imaginary line does not overlap the second coil pattern in a portion in which the imaginary line extends side by side with the second coil pattern. 7 . The multilayer substrate according to claim 6 , wherein non-uniformity of the second coil pattern in a dimension in the layer stacking direction is smaller than non-uniformity of the first coil pattern in a dimension in the layer stacking direction. 8 . The multilayer substrate according to claim 6 , wherein the first coil pattern includes an underlayer conductor disposed on the first principal surface of the first insulating layer and a plated layer disposed on the underlayer conductor. 9 . The multilayer substrate according to claim 6 , wherein the first coil pattern and the second coil pattern are electrically connected to each other. 10 . The multilayer substrate according to claim 6 , wherein the element assembly further includes a third insulating layer which is stacked to be located at a second side of the first insulating layer with respect to the layer stacking direction; the multilayer substrate further includes: a third coil pattern disposed on a second principal surface of the first insulating layer that is on the second side of the first insulating layer with respect to the layer stacking direction; and a fourth coil pattern disposed on a second principal surface of the third insulating layer that is on a second side of the third insulating layer with respect to the layer stacking direction; when viewed from the layer stacking direction, at least a portion of a third area in which the third coil pattern is disposed and at least a portion of a fourth area in which the fourth coil pattern is disposed overlap each other; and a maximum thickness of the fourth coil pattern is smaller than a maximum thickness of the third coil pattern. 11 . A multilayer substrate comprising: an element assembly including a first insulating layer and a second insulating layer which are stacked in layers in a layer stacking direction such that the second insulating layer is located at a first side of the first insulating layer with respect to the layer stacking direction; a first coil pattern disposed on a first principal surface of the first insulating layer that is on the first side of the first insulating layer with respect to the layer st

Assignees

Inventors

Classifications

  • incorporating printed inductors · CPC title

  • characterised by the electroplating method; means therefor, e.g. baths or apparatus · CPC title

  • Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295 (H05K1/11 takes precedence; lay-out adapted to mounted component configuration H05K1/18) · CPC title

  • of organic insulating material · CPC title

  • Via connections; Lands around holes or via connections (H05K1/112 takes precedence) · CPC title

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What does patent US2019057803A1 cover?
A multilayer substrate includes first and second insulating layers stacked in a stacking direction with the second insulating layer located at a first side of the first insulating layer in the stacking direction, a first coil pattern disposed on a first principal surface of the first insulating layer on the first side of the first insulating layer in the stacking direction, and a second coil pa…
Who is the assignee on this patent?
Murata Manufacturing Co
What technology area does this patent fall under?
Primary CPC classification H01F27/2804. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Feb 21 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).