Secure circuit control to disable circuitry

Patent metadata

Field	Value
Publication number	US-2019026501-A1
Application number	US-201816128396-A
Country	US
Kind code	A1
Filing date	Sep 11, 2018
Priority date	Jun 2, 2017
Publication date	Jan 24, 2019
Grant date	—

Abstract

Techniques are disclosed in which a secure circuit controls a gating circuit to enable or disable other circuitry of a device (e.g., one or more input sensors). For example, the gating circuit may be a power gating circuit and the secure circuit may be configured to disable power to an input sensor in certain situations. As another example, the gating circuit may be a clock gating circuit and the secure circuit may be configured to disable the clock to an input sensor. As yet another example, the gating circuit may be configured to gate a control bus and the secure circuit may be configured to disable control signals to an input sensor. In some embodiments, hardware resources included in or controlled by the secure circuit are not accessible by other elements of the device, other than by sending requests to a predetermined set of memory locations (e.g., a secure mailbox).

First claim

What is claimed is:

1 . An apparatus, comprising:
a processor configured to access data generated by one or more sensors; a gating circuit configured to provide signaling to the one or more sensors; and a secure circuit, wherein the apparatus is configured not to allow access to hardware resources of the secure circuit other than via a predefined subset of circuitry in the secure circuit; wherein apparatus is configured such that management of a control signal input to the gating circuit is limited to the secure circuit, wherein a first value of the control signal disables signaling to the one or more sensors such that other elements of the apparatus cannot enable the one or more sensors when the secure circuit sets the control signal to the first value.

2 . The apparatus of claim 1 , wherein the gating circuit is a power gating circuit.

3 . The apparatus of claim 1 , wherein the gating circuit is a clock gating circuit.

4 . The apparatus of claim 1 , wherein the gating circuit is a control gating circuit.

5 . The apparatus of claim 1 , wherein the gating circuit is configured to disable communications of sensor data from the one or more sensors to other elements of the apparatus based on the first value of the control signal.

6 . The apparatus of claim 1 , wherein the secure circuit is configured to disable the one or more sensors in response to the apparatus entering a predetermined location.

7 . The apparatus of claim 1 , wherein the secure circuit is configured to unconditionally disable the one or more sensors for a specified time interval subsequent to input requesting disablement of the one or more sensors.

8 . The apparatus of claim 1 , wherein the secure circuit is configured to enable the one or more sensors only in response to the secure circuit authenticating one or more biometric credentials from a user of the apparatus.

9 . The apparatus of claim 8 , wherein the secure circuit is configured to require re-authentication after a time interval has elapsed subsequent to authentication of the one or more biometric credentials and disable the one or more sensors based on failure to re-authenticate.

10 . The apparatus of claim 1 , wherein the one or more sensors include one or more of a camera or an audio input module.

11 . The apparatus of claim 1 , wherein the gating circuit is configured to disable the one or more sensors in response to detecting that the apparatus is in a closed physical configuration.

12 . The apparatus of claim 1 , wherein the apparatus is configured to implement a profile in which the secure circuit is configured to maintain the control signal at the first value.

13 . The apparatus of claim 12 , wherein implementation of the profile is required for access to a network.

14 . A method, comprising:
determining, by a secure circuit in a computing device, to disable one or more sensors, wherein the computing device includes a processor configured to access data generated by the one or more sensors and a gating circuit configured to provide signaling to the one or more sensors, wherein the computing device is configured not to allow access to hardware resources of the secure circuit other than via a predefined subset of circuitry included in the secure circuit, and wherein management of a control signal input to the gating circuit is limited to the secure circuit; and setting the control signal to a first value to disable the one or more sensors such that other elements of the computing device cannot enable on the one or more sensors until the secure circuit changes the control signal from the first value to a second value.

15 . The method of claim 14 , wherein the determining is based on a message received from the processor via the predefined subset of circuitry.

16 . A non-transitory computer-readable medium having instructions stored thereon that are executable by a computing device to perform operations comprising:
receiving user input requesting disabling of one or more sensors of the computing device; and sending one or more signals to a predefined subset of circuitry included in a secure circuit, wherein the computing device includes a processor configured to access data generated by the one or more sensors and a gating circuit configured to provide signaling to the one or more sensors, wherein the computing device is configured not to allow access to hardware resources of the secure circuit other than via signals sent to the predefined subset, and wherein management of a control signal for the gating circuit is limited to the secure circuit; wherein the one or more signals cause the secure circuit to set the control signal to a first value to disable the one or more sensors such that other elements of the computing device cannot enable the one or more sensors until the secure circuit changes the control signal from the first value to a second value.

17 . The non-transitory computer-readable medium of claim 16 , wherein, to disable the one or more sensors, the gating circuit is configured to gate one or more of:
power to the one or more sensors; a clock to the one or more sensors; or control information to the one or more sensors.

18 . The non-transitory computer-readable medium of claim 16 , wherein the secure circuit is configured to disable the one or more sensors in response to the computing device entering a predetermined location.

19 . The non-transitory computer-readable medium of claim 16 , wherein the secure circuit is configured to authenticate one or more biometric credentials from a user of the computing device before enabling the one or more sensors.

20 . The non-transitory computer-readable medium of claim 16 , wherein the one or more sensors include one or more of a camera or an audio input module.

Assignees

• Apple Inc

Inventors

• Martel Pierre-Olivier J
• Wilcox Jeffrey R
• Shaeffer Ian P
• Myrick Andrew D
• Hill Robert W
• Schaap Tristan F

Classifications

• G06F21/81

  by operating on the power supply, e.g. enabling or disabling power-on, sleep or resume operations · CPC title

• G06F2221/2111

  Location-sensitive, e.g. geographical location, GPS · CPC title

• G06F21/76 Primary

  in application-specific integrated circuits [ASIC] or field-programmable devices, e.g. field-programmable gate arrays [FPGA] or programmable logic devices [PLD] · CPC title

• G06F21/32

  using biometric data, e.g. fingerprints, iris scans or voiceprints · CPC title