Technologies for managing quality of service platform interconnects

Patent metadata

Field	Value
Publication number	US-2019004862-A1
Application number	US-201715637003-A
Country	US
Kind code	A1
Filing date	Jun 29, 2017
Priority date	Jun 29, 2017
Publication date	Jan 3, 2019
Grant date	—

Abstract

Technologies for managing quality of service of a platform interconnect include a compute device. The compute device includes one or more processors, one or more resources capable of being utilized by the one or more processors, and a platform interconnect to facilitate communication of messages between the one or more processors and the one or more resources. The compute device is to obtain class of service data for one or more workloads to be executed by the compute device. The class of service data is indicative of a capacity of one or more of the resources to be utilized in the execution of each corresponding workload. The compute device is also to execute the one or more workloads and manage the amount of traffic transmitted through the platform interconnect for each corresponding workload as a function of the class of service data as the one or more workloads are executed.

First claim

1 . A compute device to manage quality of service of a platform interconnect, the compute device comprising:
one or more processors; one or more resources capable of being utilized by the one or more processors; a platform interconnect to facilitate communication of messages among the one or more processors and the one or more resources; one or more memory devices having stored therein a plurality of instructions that, when executed by the one or more processors, cause the compute device to:
obtain class of service data for one or more workloads to be executed by the compute device, wherein the class of service data is indicative of a capacity of one or more of the resources to be utilized in the execution of each corresponding workload;
execute the one or more workloads; and
manage the amount of traffic transmitted through the platform interconnect for each workload as a function of the class of service data of the corresponding workload as the one or more workloads are executed.

2 . The compute device of claim 1 , wherein the plurality of instructions, when executed, further cause the compute device to determine, as a function of the class of service data, amounts of credits to be assigned to the one or more processors and the one or more resources to control message traffic through the platform interconnect.

3 . The compute device of claim 2 , wherein to determine the amounts of credits comprises to determine a number of credits for request messages to be transmitted through the platform interconnect.

4 . The compute device of claim 2 , wherein to determine the amounts of credits comprises to determine a number of credits for data messages to be transmitted through the platform interconnect.

5 . The compute device of claim 2 , wherein to determine the amounts of credits comprises to determine a number of credits for acknowledgment messages to be transmitted through the platform interconnect.

6 . The compute device of claim 2 , wherein to determine the amounts of credits comprises to determine a number of credits for error messages to be transmitted through the platform interconnect.

7 . The compute device of claim 2 , wherein the plurality of instructions, when executed, further cause the compute device to write the determined amounts of credits to one or more registers.

8 . The compute device of claim 2 , wherein to manage the amount of traffic through the platform interconnect for each workload comprises to:
obtain a notification from a component of the compute device to transmit a message through the platform interconnect; determine a type of the message associated with the notification; determine whether a threshold number of credits of the determined type are available; and allow, in response to a determination that the threshold number of credits of the determined type are available, transmission of the message through the platform interconnect.

9 . The compute device of claim 8 , wherein to manage the amount of traffic through the platform interconnect for each workload further comprises to delay, in response to a determination that the threshold number of credits of the determined type are not available, transmission of the message through the platform interconnect.

10 . The compute device of claim 8 , wherein the plurality of instructions, when executed, further cause the compute device to adjust the number of credits after allowing transmission of the message.

11 . The compute device of claim 10 , wherein to adjust the number of credits comprises to reduce the number of credits when the message is sent through the platform interconnect.

12 . The compute device of claim 11 , wherein the plurality of instructions, when executed, further cause the compute device to increase the number of credits when the message is received by a recipient component of the compute device.

13 . One or more machine-readable storage media comprising a plurality of instructions stored thereon that, in response to being executed, cause a compute device to:
obtain class of service data for one or more workloads to be executed by the compute device, wherein the class of service data is indicative of a capacity of one or more of the resources to be utilized in the execution of each corresponding workload; execute the one or more workloads; and manage the amount of traffic transmitted through a platform interconnect for each workload as a function of the class of service data of the corresponding workload as the one or more workloads are executed.

14 . The one or more machine-readable storage media of claim 13 , wherein the plurality of instructions, when executed, further cause the compute device to determine, as a function of the class of service data, amounts of credits to be assigned to the one or more processors and the one or more resources to control message traffic through the platform interconnect.

15 . The one or more machine-readable storage media of claim 14 , wherein to determine the amounts of credits comprises to determine a number of credits for request messages to be transmitted through the platform interconnect.

16 . The one or more machine-readable storage media of claim 14 , wherein to determine the amounts of credits comprises to determine a number of credits for data messages to be transmitted through the platform interconnect.

17 . The one or more machine-readable storage media of claim 14 , wherein to determine the amounts of credits comprises to determine a number of credits for acknowledgment messages to be transmitted through the platform interconnect.

18 . The one or more machine-readable storage media of claim 14 , wherein to determine the amounts of credits comprises to determine a number of credits for error messages to be transmitted through the platform interconnect.

19 . The one or more machine-readable storage media of claim 14 , wherein the plurality of instructions, when executed, further cause the compute device to write the determined amounts of credits to one or more registers.

20 . The one or more machine-readable storage media of claim 14 , wherein to manage the amount of traffic through the platform interconnect for each workload comprises to:
obtain a notification from a component of the compute device to transmit a message through the platform interconnect; determine a type of the message associated with the notification; determine whether a threshold number of credits of the determined type are available; and allow, in response to a determination that the threshold number of credits of the determined type are available, transmission of the message through the platform interconnect.

21 . The one or more machine-readable storage media of claim 20 , wherein to manage the amount of traffic through the platform interconnect for each workload further comprises to delay, in response to a determination that the threshold number of credits of the determined type are not available, transmission of the message through the platform interconnect.

22 . The one or more machine-readable storage media of claim 20 , wherein the plurality of instructions, when executed, further cause the compute device to adjust the number of credits after allowing transmission of the message.

23 . The one or more machine-readable storage media of claim 22 , wherein to adjust the number of credits comprises to reduce the number of credits when the message is sent through the platform interconnect.

Assignees

• Intel Corp

Inventors

• Bernat Francesc Guim
• Doshi Kshitij A
• Herdrich Andrew J
• Verplanke Edwin
• Barragan Daniel Rivas

Classifications

• G06F2209/501

  Performance criteria · CPC title

• G06F9/46

  Multiprogramming arrangements · CPC title

• G06F13/38

  Information transfer, e.g. on bus (G06F13/14 takes precedence) · CPC title

• G06F9/5038 Primary

  considering the execution order of a plurality of tasks, e.g. taking priority or time dependency constraints into consideration (scheduling strategies G06F9/4881 and subgroups) · CPC title

• G06F9/5083

  Techniques for rebalancing the load in a distributed system · CPC title