Array substrate, manufacturing method thereof, and display apparatus

Patent metadata

Field	Value
Publication number	US-2018364530-A1
Application number	US-201615521339-A
Country	US
Kind code	A1
Filing date	Nov 2, 2016
Priority date	Mar 4, 2016
Publication date	Dec 20, 2018
Grant date	—

Abstract

This present disclosure provides an array substrate, a manufacturing method thereof, and a display apparatus, aiming at solving the issue of light reflection on the array substrates and improving the display effects of display apparatuses. The array substrate includes a transparent substrate; a plurality of components disposed on a first side of the transparent substrate; and a shielding pattern, disposed on a second side of the transparent substrate, and configured to shield light reflected from a surface of at least one of the plurality of components.

First claim

1 . An array substrate, comprising:
a transparent substrate; a plurality of components, disposed on a first side of the transparent substrate; and a shielding pattern, disposed on a second side of the transparent substrate, and configured to shield light reflected from a surface of at least one of the plurality of components.

2 . The array substrate of claim 1 , wherein projection of the shielding pattern on the transparent substrate overlaps with projection of the plurality of components on the transparent substrate.

3 . The array substrate of claim 2 , wherein the projection of the shielding pattern on the transparent substrate has a same pattern as the projection of the plurality of components on the transparent substrate.

4 . The array substrate of claim 1 , wherein the plurality of components comprise a plurality of thin-film transistors, a plurality of gate lines, and a plurality of data lines.

5 . The array substrate of claim 1 , wherein the shielding pattern comprises a black matrix material.

6 . The array substrate of claim 1 , wherein the shielding pattern comprises molybdenum oxide or molybdenum-niobium oxide, and the array substrate further comprises an electrostatic shielding layer, disposed between the transparent substrate and the shielding pattern.

7 . The array substrate of claim 1 , further comprising a protection layer, disposed on a side of the shielding pattern opposing to the transparent substrate.

8 . A display apparatus, comprising an array substrate according to claim 1 .

9 . The display apparatus according to claim 8 , further comprising a backlight module and a color film substrate, wherein the backlight module is disposed on one side of the color film substrate opposing to the array substrate.

10 . A method for manufacturing an array substrate, comprising:
forming a plurality of thin-film transistors, a plurality of gate lines, and a plurality of data lines on a first side of a transparent substrate; and forming a shielding pattern on a second side of the transparent substrate, wherein the shielding pattern is configured to shield light reflected from a surface of at least one of the plurality of thin-film transistors, the plurality of gate lines, and the plurality of data lines.

11 . The method according to claim 10 , wherein projection of the shielding pattern on the transparent substrate overlaps with projection of the plurality of thin-film transistors, the plurality of gate lines and the plurality of data lines on the transparent substrate.

12 . The method according to claim 11 , wherein the projection of the shielding pattern on the transparent substrate has a same pattern as the projection of the plurality of thin-film transistors, the plurality of gate lines, and the plurality of data lines on the transparent substrate.

13 . The method according to claim 12 , wherein the shielding pattern comprises molybdenum oxide or molybdenum-niobium oxide.

14 . The method according to claim 13 , further comprising, between the step of forming a plurality of thin-film transistors, a plurality of gate lines, and a plurality of data lines on a first side of a transparent substrate and the step of forming a shielding pattern on a second side of the transparent substrate, a step of:
forming an electrostatic shielding layer on a second side of the transparent substrate, wherein the electrostatic shielding layer is disposed between the transparent substrate and the shielding pattern.

15 . The method according to claim 14 , wherein the step of forming a shielding pattern on a second side of the transparent substrate comprises the sub-steps of:
forming a shielding thin film on the second side of the transparent substrate; coating a photoresist on a side of the shielding thin film opposing to the transparent substrate; exposing the shielding thin film from the first side of the transparent substrate; and etching the shielding thin film to form a shielding pattern.

16 . The method according to claim 15 , wherein in the sub-step of forming a shielding thin film on the second side of the transparent substrate, the shielding thin film is formed by deposition.

17 . The method according to claim 15 , wherein the sub-step of exposing the shielding thin film from the first side of the transparent substrate is performed by a self-aligned exposure process.

18 . The method according to claim 12 , wherein the shielding pattern comprises a black matrix material.

19 . The method according to claim 18 , wherein the step of forming a shielding pattern on a second side of the transparent substrate comprises the sub-steps of:
forming a shielding thin film on a second side of the transparent substrate; exposing the shielding thin film from the first side of the transparent substrate; and developing the shielding thin film to form a shielding pattern.

20 . The method according to claim 19 , wherein the sub-step of exposing the shielding thin film from the first side of the transparent substrate is performed by a self-aligned exposure process, the method further comprising forming a protection layer on a side of the shielding pattern opposing to the transparent substrate.

21 . (canceled)

Assignees

• Boe Technology Group Co Ltd
• Beijing Boe Display Tech Co

Inventors

• Wang Shoukun
• Li Liangliang
• Feng Yuchun
• Guo Huibin

Classifications

• G02F1/1333

  Constructional arrangements; {Manufacturing methods}(G02F1/135, G02F1/136 take precedence) · CPC title

• G02F1/136209 Primary

  Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element · CPC title

• G02F2202/22

  Antistatic materials or arrangements · CPC title

• G02F1/136204

  Arrangements to prevent high voltage or static electricity failures · CPC title

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title