Optimizing data approximation analysis using low power circuitry

Patent metadata

Field	Value
Publication number	US-2018350422-A1
Application number	US-201816000207-A
Country	US
Kind code	A1
Filing date	Jun 5, 2018
Priority date	Jun 2, 2017
Publication date	Dec 6, 2018
Grant date	—

Abstract

Optimizing data approximation analysis using low power circuitry including receiving a first set of data results and a second set of data results; charging a first capacitor on the circuit with a unit of charge for each of the first set of data results that indicates a positive data point; charging a second capacitor on the circuit with the unit of charge for each of the second set of data results that indicates a positive data point; applying a voltage from the first capacitor and a voltage from the second capacitor to a FET on the circuit, wherein a current flows through the FET toward an output of the circuit if the voltage on the first capacitor is greater than the voltage on the second capacitor and a difference in the voltage of the first capacitor and the second capacitor is greater than a threshold voltage of the FET.

First claim

1 . A method of optimizing data approximation analysis using low power circuitry comprising:
applying a voltage from a first capacitor and a voltage from a second capacitor to a transistor on the circuit, wherein the first capacitor is charged with a unit of charge for each of a first set of data results that indicates a positive data point, wherein the second capacitor is charged with the unit of charge for each of a second set of data results that indicates a positive data point, and wherein a current flows through the transistor toward an output of the circuit if the voltage on the first capacitor is greater than the voltage on the second capacitor and a difference in the voltages of the first capacitor and the second capacitor is greater than a threshold voltage of the transistor; and generating a signal on the output of the circuit to indicate that the positive data points in the first set of data results is greater than the positive data points in the second set of data results and that a difference between the positive data points in the first set of data results and the positive data points in the second set of data results is greater than a probability range.

2 . The method of claim 1 , further comprising:
determining that the charge on the first capacitor has exceeded a capacitor threshold; and resetting the charges on the first capacitor and the second capacitor to a baseline charge.

3 . The method of claim 1 , wherein the probability range is calculated as a function of the threshold voltage of the transistor.

4 . The method of claim 1 , wherein the unit of charge is placed on the first capacitor using a non-inverting level shifter.

5 . The method of claim 1 , wherein the current flowing through the transistor causes the output of the circuit to indicate a positive result.

6 . The method of claim 1 , wherein the first capacitor and the second capacitor are charged to a baseline voltage before being charged with the unit of charge.

7 . The method of claim 1 , wherein the positive data points in the first set of data results indicate a first type of relationship between a first test and a second test, and wherein the positive data points in the second set of data results indicate a second type of relationship between the first test and the second test.

8 - 20 . (canceled)

Assignees

• IBM

Inventors

• Erickson Karl R
• Paone Phil C
• Paulik George F
• Paulsen David P
• Sheets Ii John E
• Uhlmann Gregory J

Classifications

• G11C11/24 Primary

  using capacitors (G11C11/22 takes precedence; using a combination of semiconductor devices and capacitors G11C11/34, e.g. G11C11/40) · CPC title

• G11C11/40

  using transistors · CPC title

• G11C29/021 Primary

  in voltage or current generators · CPC title

• G11C29/50008

  of impedance · CPC title

• G11C2029/5004

  Voltage · CPC title