Display panel and display device

US2018348554A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2018348554-A1
Application numberUS-201715793873-A
CountryUS
Kind codeA1
Filing dateOct 25, 2017
Priority dateJun 6, 2017
Publication dateDec 6, 2018
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display panel and a display device, the display panel includes an array substrate; wherein the array substrate includes a common electrode, a first insulation layer, a plurality of pixel electrodes and an alignment layer; the common electrode, first insulation layer, plurality of pixel electrodes and alignment layer are successively arranged; at least one first through hole is defined in the first insulation layer, and the alignment layer contacts with the common electrode via the at least one first through hole. By arranging in such a manner, although a thin-film transistor stays in a turn-on state for an extremely short time, however, since the common electrode is always in a conductive state, so that the electrostatic charge remaining on the alignment layer can be conducted away by the common electrode, thereby reducing the electrostatic charge remaining on the alignment layer, and thus improving display quality of display panel.

First claim

Opening claim text (preview).

1 . A display panel, comprising: an array substrate; wherein the array substrate comprises a common electrode, a first insulation layer, a plurality of pixel electrodes and an alignment layer; the common electrode, the first insulation layer, the plurality of pixel electrodes and the alignment layer are successively arranged; at least one first through hole is defined in the first insulation layer, and the alignment layer contacts with the common electrode via the at least one first through hole, wherein the display panel further comprises: a thin-film transistor; wherein an end of each of the pixel electrodes is connected with a drain electrode of the thin-film transistor, and the end of each of the pixel electrodes connected with the drain electrode of the thin-film transistor is a signal transmission end of each of the pixel electrodes, one or more of the at least one first through hole is provided in an area between adjacent two of the pixel electrodes away from the signal transmission ends of the adjacent two of the pixel electrodes. 2 . The display panel according to claim 1 , wherein a conductive material is provided in the at least one first through hole, the conductive material and the plurality of pixel electrodes are arranged in a same layer, and the conductive material is electrically connected with the alignment layer and the common electrode, respectively. 3 . The display panel according to claim 1 , further comprising: a color film substrate, the color film substrate comprising a black matrix; wherein the color film substrate is placed at a side of the alignment layer away from the array substrate, and an orthogonal projection of the black matrix on the array substrate covers an orthogonal projection of the at least one first through hole on the array substrate. 4 . The display panel according to claim 1 , wherein the at least one first through hole is defined in an area of the first insulation layer between any adjacent two of the pixel electrodes, the alignment layer contacts with the common electrode via each of the at least one first through hole. 5 . (canceled) 6 . The display panel according to claim 1 , wherein the one or more of the at least one first through hole is provided at a middle position of the area along a first direction, and the first direction is a row direction of distribution of the pixel electrodes. 7 . The display panel according to claim 1 , wherein the one or more of the at least one first through hole is provided at a middle position of the area along a second direction, and the second direction is a column direction of distribution of the pixel electrodes. 8 . The display panel according to claim 1 , wherein at least one first through hole is provided at a middle position of the area along both a first direction and a second direction, the first direction is a row direction of distribution of the pixel electrodes, and the second direction is a column direction of distribution of the pixel electrodes. 9 . The display panel according to claim 1 , wherein the at least one first through hole is strip-like hole, and the pixel electrodes are strip-like electrodes, a length direction of the at least one first through hole is in accordance with a length direction of the pixel electrodes. 10 . A display panel, comprising: an array substrate; wherein the array substrate comprises a common electrode, a first insulation layer, a plurality of pixel electrodes and an alignment layer; the common electrode, the first insulation layer, the plurality of pixel electrodes and the alignment layer are successively arranged; at least one first through hole is defined in the first insulation layer, and the alignment layer contacts with the common electrode via the at least one first through hole, wherein the display panel further comprises: a plurality of thin-film transistors; wherein an end of each of the pixel electrodes is connected with a drain electrode of one of the thin-film transistors, and the end of each of the pixel electrodes connected with the drain electrode of one of the thin-film transistors is a signal transmission end of each of the pixel electrodes; one or more of the at least one first through hole is provided in an area between two adjacent signal transmission ends. 11 . The display panel according to claim 10 , wherein the one or more of the at least one first through hole is provided at a middle position of the area along a first direction, and the first direction is a row direction of distribution of the pixel electrodes. 12 . The display panel according to claim 10 , wherein the one or more of the at least one first through hole is provided at a middle position of the area along a second direction, and the second direction is a column direction of distribution of the pixel electrodes. 13 . The display panel according to claim 10 , wherein the one or more of the at least one first through hole is provided at a middle position of the area along both a first direction and a second direction, the first direction is a row direction of distribution of the pixel electrodes, and the second direction is a column direction of distribution of the pixel electrodes. 14 . The display panel according to claim 10 , wherein the at least one first through hole is square-shaped. 15 . The display panel according to claim 1 , further comprising: at least one first touch wiring; wherein a conductive material and the plurality of pixel electrodes are arranged in a same layer, and the conductive material is electrically connected with the common electrode and the at least one first touch wiring, respectively; during a touch stage, the common electrode is also used as a touch electrode. 16 . The display panel according to claim 15 , further comprising: at least one dummy touch wiring insulated from the common electrode. 17 . (canceled) 18 . (canceled) 19 . The display panel according to claim 10 , wherein a conductive material is provided in the at least one first through hole, the conductive material and the plurality of pixel electrodes are arranged in a same layer, and the conductive material is electrically connected with the alignment layer and the common electrode, respectively. 20 . The display panel according to claim 10 , further comprising: a color film substrate, the color film substrate comprising a black matrix; wherein the color film substrate is placed at a side of the alignment layer away from the array substrate, and an orthogonal projection of the black matrix on the array substrate covers an orthogonal projection of the at least one first through hole on the array substrate. 21 . The display panel according to claim 10 , wherein the at least one first through hole is defined in an area of the first insulation layer between any adjacent two of the pixel electrodes, the alignment layer contacts with the common electrode via each of the at least one first through hole. 22 . The display panel according to claim 10 , further comprising: at least one first touch wiring; wherein a conductive material and the plurality of pixel electrodes are arranged in a same layer, and the conductive material is electrically connected with the common electrode and the at least one first touch wiring, respectively; during a touch stage, the common electrode is also used as a touch electrode. 23 . The display panel according to claim 22 , further comprising: at least one dummy to

Assignees

Inventors

Classifications

  • Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads · CPC title

  • Through-hole connection of the pixel electrode to the active element through an insulation layer · CPC title

  • Input devices, e.g. touch panels · CPC title

  • G02F1/1337Primary

    Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers · CPC title

  • Insulating layers (G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence) · CPC title

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What does patent US2018348554A1 cover?
A display panel and a display device, the display panel includes an array substrate; wherein the array substrate includes a common electrode, a first insulation layer, a plurality of pixel electrodes and an alignment layer; the common electrode, first insulation layer, plurality of pixel electrodes and alignment layer are successively arranged; at least one first through hole is defined in the …
Who is the assignee on this patent?
Xiamen Tianma Micro Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/1337. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Dec 06 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).