Sensing system

Patent metadata

Field	Value
Publication number	US-2018342461-A1
Application number	US-201715705277-A
Country	US
Kind code	A1
Filing date	Sep 15, 2017
Priority date	May 23, 2017
Publication date	Nov 29, 2018
Grant date	—

Abstract

A sensing system including a substrate, at least one explicit device, at least one inner operation device, a plurality of conductors, and a plurality of conductive traces is provided. The substrate has a first surface and a second surface opposite to the first surface, and has a plurality of vias communicating the first surface and the second surface. The explicit device is disposed on the first surface. The explicit device includes a display, a sensor, or a combination thereof. The inner operation device is totally disposed on the second surface. The inner operation device includes a signal processor, a driver, or a combination thereof. The conductors are disposed in the vias, respectively, and connect the at least one explicit device with the at least one inner operation device. The conductive traces are disposed on at least one of the first surface and the second surface.

First claim

What is claimed is:

1 . A sensing system, comprising:
a substrate, having a first surface and a second surface opposite to the first surface, and having a plurality of vias communicating the first surface and the second surface; at least one explicit device, disposed on the first surface, wherein the at least one explicit device comprises a display, a sensor, or a combination thereof; at least one inner operation device, totally disposed on the second surface, wherein the at least one inner operation device comprises a signal processor, a driver, or a combination thereof; a plurality of conductors, respectively disposed in the vias, and connecting the at least one explicit device with the at least one inner operation device; and a plurality of conductive traces, disposed on at least one of the first surface and the second surface, wherein a depth-to-width ratio obtained by dividing a depth of each via in a direction perpendicular to the first surface by a width thereof in a direction parallel to the first surface is greater than or equal to 1.5, and a thickness-to-width ratio obtained by dividing a thickness of each conductive trace in the direction perpendicular to the first surface by a width thereof in a direction parallel to the first surface is greater than or equal to 1.5.

2 . The sensing system as claimed in claim 1 , wherein a dielectric constant of the sensing system is smaller than 6.0 and a dielectric loss tangent thereof is smaller than 0.01 when a signal frequency thereof is greater than 10 GHz.

3 . The sensing system as claimed in claim 1 , wherein a root mean square roughness R RMS of wall surfaces of the vias is smaller than 100 nm.

4 . The sensing system as claimed in claim 1 , wherein a root mean square roughness R RMS of surfaces of the conductive traces is smaller than 100 nm.

5 . The sensing system as claimed in claim 1 , wherein a diameter of each of the vias is smaller than or equal to 10 μm.

6 . The sensing system as claimed in claim 1 , wherein an included angle between a wall surface of each via and a central axis of the each via along an extending direction thereof is smaller than or equal to 5 degrees.

7 . The sensing system as claimed in claim 1 , wherein a visible light transmittance of the substrate is greater than 80%.

8 . The sensing system as claimed in claim 1 , wherein a material of the substrate is a silicon-oxide-based material or a silicon-nitride-based material.

9 . The sensing system as claimed in claim 1 , wherein the at least one explicit device comprises the sensor, and the sensor comprises an environment temperature sensor, an environment humidity sensor, an environment microparticle sensor, an environment ultraviolet sensor, an environment radiation sensor, or a combination thereof.

10 . The sensing system as claimed in claim 1 , wherein the at least one inner operation device further comprises an analog-to-digital converter, a passive device, a memory, a power supply or a combination thereof.

11 . The sensing system as claimed in claim 1 , wherein the conductors is directly connected to the at least one explicit device and the at least one inner operation device.

12 . A sensing system, comprising:
a substrate, having a first surface and a second surface opposite to the first surface, and having a plurality of vias communicating the first surface and the second surface; at least one explicit device, disposed on the first surface, wherein the at least one explicit device comprises a display, a sensor, or a combination thereof; at least one inner operation device, totally disposed on the second surface, wherein the at least one inner operation device comprises a signal processor, a driver, or a combination thereof; a plurality of conductors, respectively disposed in the vias, and directly connected to the at least one explicit device and the at least one inner operation device; and a plurality of conductive traces, disposed on at least one of the first surface and the second surface.

13 . The sensing system as claimed in claim 12 , wherein a dielectric constant of the sensing system is smaller than 6.0 and a dielectric loss tangent thereof is smaller than 0.01 when a signal frequency thereof is greater than 10 GHz.

14 . The sensing system as claimed in claim 12 , wherein a root mean square roughness R RMS of wall surfaces of the vias is smaller than 100 nm.

15 . The sensing system as claimed in claim 12 , wherein a root mean square roughness R RMS of surfaces of the conductive traces is smaller than 100 nm.

16 . The sensing system as claimed in claim 12 , wherein a diameter of each of the vias is smaller than or equal to 10 μm.

17 . The sensing system as claimed in claim 12 , wherein an included angle between a wall surface of each via and a central axis of the each via along an extending direction thereof is smaller than or equal to 5 degrees.

18 . The sensing system as claimed in claim 12 , wherein a visible light transmittance of the substrate is greater than 80%.

19 . The sensing system as claimed in claim 12 , wherein a material of the substrate is a silicon-oxide-based material or a silicon-nitride-based material.

20 . The sensing system as claimed in claim 19 , wherein the substrate is a glass substrate or a quartz substrate.

21 . The sensing system as claimed in claim 12 , wherein the at least one explicit device comprises the sensor, and the sensor comprises an environment temperature sensor, an environment humidity sensor, an environment microparticle sensor, an environment ultraviolet sensor, an environment radiation sensor, or a combination thereof.

22 . The sensing system as claimed in claim 12 , wherein the at least one inner operation device further comprises an analog-to-digital converter, a passive device, a memory, a power supply or a combination thereof.

23 . A sensing system, comprising:
a substrate, having a first surface and a second surface opposite to the first surface, and having a plurality of vias communicating the first surface and the second surface; at least one explicit device, disposed on the first surface, wherein the at least one explicit device comprises a display, a sensor, or a combination thereof; at least one inner operation device, totally disposed on the second surface, wherein the at least one inner operation device comprises a signal processor, a driver, or a combination thereof; at least one physiological sensing device; a plurality of conductors, respectively disposed in the vias, and connecting the at least one explicit device with the at least one inner operation device or the at least one physiological sensing device; and a plurality of conductive traces, disposed on at least one of the first surface and the second surface, wherein a depth-to-width ratio obtained by dividing a depth of each via in a direction perpendicular to the first surface by a width thereof in a direction parallel to the first surface is greater than or equal to 1.5, and a thickness-to-width ratio obtained by dividing a thickness of each conductive trace in the direction perpendicular to the first surface by a width thereof in a direction parallel to the first surface is greater than or equal to 1.5.

Assignees

• Ind Tech Res Inst

Inventors

• Liu Chun-Ting
• Lin Shih-Ming
• Hu Je-Ping
• Liou Jung-Shiuan

Classifications

• H10W90/00

  Package configurations · CPC title

• H10W44/209

  Vertical interconnections, e.g. vias · CPC title

• H10W99/00

  Subject matter not provided for in other groups of this subclass · CPC title

• H10W70/692

  Ceramics or glasses · CPC title

• H10W70/095

  of vias therein · CPC title