Compound semiconductor device and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-2018337271-A1
Application number	US-201815975938-A
Country	US
Kind code	A1
Filing date	May 10, 2018
Priority date	May 16, 2017
Publication date	Nov 22, 2018
Grant date	—

Abstract

A compound semiconductor device includes an electron transit layer, a spacer layer disposed on the electron transit layer, and an electron supply layer disposed on the spacer layer and containing a donor impurity. The electron supply layer has a concentration distribution of the donor impurity where the donor impurity is at a first concentration at an interface between the electron supply layer and the spacer layer and at a second concentration lower than the first concentration at an upper surface of the electron supply layer, and a concentration of the donor impurity at one of arbitrarily-selected two positions closer to the upper surface in a thickness direction of the electron supply layer is less than the concentration of the donor impurity at another one of the two positions closer to the interface in the thickness direction.

First claim

What is claimed is:

1 . A compound semiconductor device, comprising:
an electron transit layer; a spacer layer disposed on the electron transit layer; and an electron supply layer disposed on the spacer layer and containing a donor impurity, wherein the electron supply layer has a concentration distribution of the donor impurity where
the donor impurity is at a first concentration at an interface between the electron supply layer and the spacer layer and at a second concentration lower than the first concentration at an upper surface of the electron supply layer, and
a concentration of the donor impurity at one of arbitrarily-selected two positions closer to the upper surface in a thickness direction of the electron supply layer is less than the concentration of the donor impurity at another one of the two positions closer to the interface in the thickness direction.

2 . The compound semiconductor device as claimed in claim 1 , wherein
the electron supply layer includes a lower first layer and an upper second layer; and only the first layer contains the donor impurity with the concentration distribution.

3 . The compound semiconductor device as claimed in claim 2 , wherein the concentration of the donor impurity in the first layer decreases as a distance from the interface increases.

4 . The compound semiconductor device as claimed in claim 1 , wherein
the electron supply layer includes a lower first layer and an upper second layer; and only the first layer contains the donor impurity at a uniform concentration.

5 . The compound semiconductor device as claimed in claim 1 , wherein the concentration of the donor impurity in the electron supply layer decreases in a direction from the interface to the upper surface.

6 . The compound semiconductor device as claimed in claim 1 , wherein the spacer layer contains the donor impurity with a concentration distribution where a concentration of the donor impurity is at a maximum value at the interface between the electron supply layer and the spacer layer.

7 . The compound semiconductor device as claimed in claim 1 , wherein
the first concentration is a maximum value of the concentration distribution; and the maximum value is within a range between 1×10 18 /cm 3 and 5×10 20 /cm 3 .

8 . The compound semiconductor device as claimed in claim 7 , wherein the maximum value is within a range between 5×10 18 /cm 3 and 5×10 19 /cm 3 .

9 . The compound semiconductor device as claimed in claim 1 , wherein the donor impurity is one or more elements selected from silicon (Si), germanium (Ge), and oxygen (O).

10 . The compound semiconductor device as claimed in claim 1 , further comprising:
an electrode disposed over the electron supply layer; and an insulation film disposed between the electron supply layer and the electrode.

11 . The compound semiconductor device as claimed in claim 1 , further comprising:
an electrode disposed over the electron supply layer, wherein a portion of the electron supply layer disposed immediately below the electrode does not contain the donor impurity.

12 . The compound semiconductor device as claimed in claim 1 , further comprising:
an electrode disposed in a groove that passes through the electron supply layer.

13 . A method of manufacturing a compound semiconductor device, the method comprising:
forming an electron transit layer; forming a spacer layer on the electron transit layer; and forming an electron supply layer containing a donor impurity on the spacer layer, wherein the electron supply layer is formed to have a concentration distribution of the donor impurity where
the donor impurity is at a first concentration at an interface between the electron supply layer and the spacer layer and at a second concentration lower than the first concentration at an upper surface of the electron supply layer, and
a concentration of the donor impurity at one of arbitrarily-selected two positions closer to the upper surface in a thickness direction of the electron supply layer is less than the concentration of the donor impurity at another one of the two positions closer to the interface in the thickness direction.

14 . The method as claimed in claim 13 , wherein
the electron supply layer includes a lower first layer and an upper second layer; and only the first layer contains the donor impurity with the concentration distribution.

15 . The method as claimed in claim 14 , wherein the concentration of the donor impurity in the first layer decreases as a distance from the interface increases.

16 . The method as claimed in claim 13 , wherein
the electron supply layer includes a lower first layer and an upper second layer; and only the first layer contains the donor impurity at a uniform concentration.

17 . The method as claimed in claim 13 , further comprising:
forming an insulation film on the electron supply layer; and forming an electrode on the insulation film.

18 . The method as claimed in claim 13 , further comprising:
forming an electrode over the electron supply layer, wherein a portion of the electron supply layer disposed immediately below the electrode does not contain the donor impurity.

19 . The method as claimed in claim 13 , further comprising:
forming a groove that passes through the electron supply layer; and forming an electrode in the groove.

20 . A power-supply device, comprising:
a high-voltage circuit including a transistor; a low-voltage circuit; and a transformer disposed between the high-voltage circuit and the low-voltage circuit, wherein the transistor includes
an electron transit layer;
a spacer layer disposed on the electron transit layer; and
an electron supply layer disposed on the spacer layer and containing a donor impurity; and
the electron supply layer has a concentration distribution of the donor impurity where
the donor impurity is at a first concentration at an interface between the electron supply layer and the spacer layer and at a second concentration lower than the first concentration at an upper surface of the electron supply layer, and
a concentration of the donor impurity at one of arbitrarily-selected two positions closer to the upper surface in a thickness direction of the electron supply layer is less than the concentration of the donor impurity at another one of the two positions closer to the interface in the thickness direction.

Assignees

• Fujitsu Ltd

Inventors

• Kotani Junji
• Nakamura Norikazu

Classifications

• H01L29/66462

  Electricity · mapped topic

• H01L29/2003

  Electricity · mapped topic

• H01L29/7787 Primary

  Electricity · mapped topic

• H01L29/1041

  Electricity · mapped topic

• H10D62/8503

  Nitride Group III-V materials, e.g. AlN or GaN · CPC title